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Title: plj Download
 Description: Digital frequency meter FPGA is written in verilog language -Digital Cymometer verilog language used FPGA
 Downloaders recently: [More information of uploader guhaitao_1986]
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fcout
.....\cmp_state.ini
.....\counter_24b.bsf
.....\counter_24b.v
.....\db
.....\..\fcout.asm.qmsg
.....\..\fcout.cbx.xml
.....\..\fcout.cmp.cdb
.....\..\fcout.cmp.hdb
.....\..\fcout.cmp.rdb
.....\..\fcout.cmp.tdb
.....\..\fcout.cmp0.ddb
.....\..\fcout.db_info
.....\..\fcout.eco.cdb
.....\..\fcout.eds_overflow
.....\..\fcout.fit.qmsg
.....\..\fcout.hier_info
.....\..\fcout.hif
.....\..\fcout.map.cdb
.....\..\fcout.map.hdb
.....\..\fcout.map.qmsg
.....\..\fcout.pre_map.cdb
.....\..\fcout.pre_map.hdb
.....\..\fcout.psp
.....\..\fcout.rtlv.hdb
.....\..\fcout.rtlv_sg.cdb
.....\..\fcout.rtlv_sg_swap.cdb
.....\..\fcout.sgdiff.cdb
.....\..\fcout.sgdiff.hdb
.....\..\fcout.sim.hdb
.....\..\fcout.sim.qmsg
.....\..\fcout.sim.rdb
.....\..\fcout.sim.vwf
.....\..\fcout.sld_design_entry.sci
.....\..\fcout.sld_design_entry_dsc.sci
.....\..\fcout.syn_hier_info
.....\..\fcout.tan.qmsg
.....\..\fcout_cmp.qrpt
.....\..\fcout_sim.qrpt
.....\display.bdf
.....\display.bsf
.....\display.v
.....\div3.bsf
.....\div3.v
.....\dividers.bdf
.....\dividers.bsf
.....\fcout.asm.rpt
.....\fcout.bdf
.....\fcout.cdf
.....\fcout.done
.....\fcout.fit.eqn
.....\fcout.fit.rpt
.....\fcout.fit.summary
.....\fcout.flow.rpt
.....\fcout.map.eqn
.....\fcout.map.rpt
.....\fcout.map.summary
.....\fcout.pin
.....\fcout.pof
.....\fcout.ppl
.....\fcout.qpf
.....\fcout.qsf
.....\fcout.qws
.....\fcout.sim.rpt
.....\fcout.sof
.....\fcout.tan.rpt
.....\fcout.tan.summary
.....\fcout.vwf
.....\Half_freq.bsf
.....\Half_freq.v
.....\mode.bsf
.....\mode.v
.....\ten_divider.bsf
.....\ten_divider.v
    

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