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Title: usb1.1 Download
 Description: USB 1.1 in Verilog code, has passed through FPGA verification
 Downloaders recently: [More information of uploader yinsongzhu]
 To Search: usb1.1 usb verilog usb usb veril Verilog USB VHDL USB usb 1.1 USB vhdl
  • [USB1.1IP-CORE-VHDL] - Sample program for USB1.1 IP core design
  • [usbhostslave] - USB host and equipment Verilog code to a
  • [RS232] - FPGA realization of RS-232 serial port t
  • [usb_funct] - FPGA USB2.0IP nuclear, contains the text
  • [ClassAdapter] - Adapter design pattern in an example of
  • [Composite] - Design Patterns in an example of composi
  • [USBipcore] - usb1.1 ip nuclear, prepared using the Ve
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