Description: RS coding in the FPGA to achieve the theory and method useful for design RS encoding, and possession of less FOGA resources
- [my_pll] - VHDL, the use of lock-in-law to achieve
- [Pseudo-random-code] - FPGA-based pseudo-random sequence to ach
- [DIGTAL_FIR] - Loop filter design, FPGA-based PLL appli
- [OFDMcode] - OFDM block of VHDL realize realize. Powe
- [sin] - The sine wave generator based on FPGA de
- [OFDM] - ALTERA Embedded Design Competition Prize
- [atl_book_and_code] - ATL developed under VC Book
- [Ice_flash] - flash read and write procedures, mainly
- [calibrate] - Camera calibration realize, based on the
- [test] - This is a set based on the S3C2440, WINC
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