Description: By 8051, composed of single-chip microcomputer system under normal circumstances, P0 timeshare I reuse as address, data bus, P2 I provide A15-A8 high eight address, P3 mouth for the second function, I usually only P1 for I/0 I. P1 I was eight quasi-two-way port, it can be independent of each and every defined as input or output, it can be used as 8-bit parallel I/O port, can also be used as 8-bit input and output side. When the work in the input, the corresponding bit latch must first buy one in order to correctly read the signal pin, or pin the implementation of reading instruction, if the corresponding bit latch the value of 0, Reading the results of Forever to 0.
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