Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: EP1C6_12_1_2_MOTO Download
 Description: ALTERA series based on the cyclone motor control routine of the experiment
 Downloaders recently: [More information of uploader free2xlm]
 To Search: ep1
File list (Check if you may need any files):
EP1C6_12_1_2_MOTO
.................\AGEB.MMF
.................\CMP3.BDF
.................\CMP3.SYM
.................\cmp_state.ini
.................\CNT.HIF
.................\CNT.SYM
.................\CNT.VHD
.................\CNT2.SYM
.................\CNT2.VHD
.................\CNT24.MMF
.................\CNT24.SYM
.................\CNT24.VHD
.................\CNT5.HIF
.................\CNT5.MMF
.................\CNT5.NDB
.................\CNT5.SNF
.................\CNT5.SYM
.................\CNT5.VHD
.................\CNT8.MMF
.................\CNT8.SYM
.................\CNT8.VHD
.................\CNTA.VHD
.................\CNTB.SYM
.................\db
.................\..\step_a.db_info
.................\..\step_a.eco.cdb
.................\..\step_a.sld_design_entry.sci
.................\DEC1.HIF
.................\DEC1.MMF
.................\DEC1.SYM
.................\DEC1.VHD
.................\DEC2.HIF
.................\DEC2.MMF
.................\DEC2.SYM
.................\DEC2.VHD
.................\DECD.HIF
.................\DECD.MMF
.................\DECD.SYM
.................\DECD.VHD
.................\DIV_4.HIF
.................\DIV_4.MIF
.................\FREQTEST.HIF
.................\FREQTEST.MMF
.................\FREQTEST.NDB
.................\FREQTEST.SNF
.................\FREQTEST.SYM
.................\FREQTEST.VHD
.................\LCNT8.HIF
.................\LCNT8.MMF
.................\LCNT8.SYM
.................\LCNT8.VHD
.................\LIB.DLS
.................\PWM_1.HIF
.................\PWM_1.MIF
.................\README
.................\......\GW48使用readme.txt
.................\REG.SYM
.................\REG.VHD
.................\ROM.VHD
.................\ROM3.BSF
.................\ROM3.VHD
.................\ROM_4.MIF
.................\SPEED.HIF
.................\SPEED.SYM
.................\SPEED_1.MMF
.................\SPEED_1.SYM
.................\STEP_A.BDF
.................\STEP_A.CDF
.................\step_a.done
.................\STEP_A.FIT
.................\STEP_A.HIF
.................\STEP_A.MMF
.................\STEP_A.NDB
.................\STEP_A.PIN
.................\STEP_A.QPF
.................\STEP_A.QSF
.................\STEP_A.QWS
.................\STEP_A.SCF
.................\STEP_A.SOF
.................\step_a_assignment_defaults.qdf
.................\STEP_B.MMF
.................\STEP_PWM.MIF
.................\STEP_PWM.MMF
.................\STP1.STP
.................\TESTCTL.SYM
.................\TESTCTL.VHD
    

CodeBus www.codebus.net