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Title: qiangdaqi Download
 Description: Answer using Verilog prepared, and when the host announced the " start game" , the system initialization, players enter the " Answer status." When a player first of all, press the Answer the switch, the corresponding indicator light, when the Answer Explorer no longer accept other input signals. Circuit with a total of sub-control (separately with four players four points- hexadecimal number), by the host control " points." " Add points" add hours after beginning the next round of Answer. Circuit can also be equipped with time control to answer questions.
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qiangdaqi
.........\.lso
.........\adder.v
.........\ban.v
.........\control.ngc
.........\control.ngr
.........\control.prj
.........\control.stx
.........\control.v
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.........\control_vhdl.prj
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.........\counter_vhdl.prj
.........\dchu.prj
.........\dchu.stx
.........\dchu.v
.........\dchu.xst
.........\dchu_vhdl.prj
.........\display.prj
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.........\display.xst
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.........\fen.prj
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.........\full.v
.........\isim
.........\....\temp
.........\....\....\hdllib.ref
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.........\....\....\vlg10
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.........\....\....\.....\display.bin
.........\....\....\vlg2D
.........\....\....\.....\glbl.bin
.........\....\....\vlg57
.........\....\....\.....\qiangdaqi.bin
.........\....\....\vlg61
.........\....\....\.....\control.bin
.........\....\work
.........\....\....\control
.........\....\....\.......\control.h
.........\....\....\.......\mingw
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.........\....\....\counter
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.........\....\....\display
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.........\....\....\.......\mingw
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.........\....\....\glbl
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.........\....\....\....\mingw
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.........\....\....\hdllib.ref
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.........\....\....\q
.........\....\....\.\mingw
.........\....\....\.\.....\q.obj
.........\....\....\.\q.h
.........\....\....\.\xsimq.cpp
.........\....\....\qiangdaqi
.........\....\....\.........\mingw
.........\....\....\.........\.....\qiangdaqi.obj
.........\....\....\.........\qiangdaqi.h
.........\....\....\vlg10
.........\....\....\.....\counter.bin
.........\....\....\vlg1E
.........\....\....\.....\display.bin
.........\....\....\vlg2D
.........\....\....\.....\glbl.bin
.........\....\....\vlg57
.........\....\....\.....\qiangdaqi.bin
.........\....\....\vlg61
.........\....\....\.....\control.bin
.........\....\....\vlg71
.........\....\....\.....\q.bin
.........\isim.cmd
.........\isim.hdlsourcefiles
.........\isim.log
.........\isim.tmp_save
.........\.............\_1
.........\isimwavedata.xwv
.........\prjname.lso
.........\q.ant
.........\q.jhd
.........\q.tbw
.........\q.tfw
.........\q.xwv
.........\q.xwv_bak
    

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