Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: 88dianzhen Download
 Description: VHDL language using 8* 8 dot matrix display, " Beijing 08" procedures. FPGA implementation can be used. Procedures which could be the " Beijing 08" be changed to show the other characters.
 Downloaders recently: [More information of uploader w19851105]
 To Search:
File list (Check if you may need any files):
88点阵
......\工程文件
......\........\chw
......\........\...\Block1.bdf
......\........\...\chw.asm.rpt
......\........\...\chw.bsf
......\........\...\chw.done
......\........\...\chw.fit.rpt
......\........\...\chw.fit.smsg
......\........\...\chw.fit.summary
......\........\...\chw.flow.rpt
......\........\...\chw.map.rpt
......\........\...\chw.map.summary
......\........\...\chw.pin
......\........\...\chw.pof
......\........\...\chw.qpf
......\........\...\chw.qsf
......\........\...\chw.qws
......\........\...\chw.sim.rpt
......\........\...\chw.sim.vwf
......\........\...\chw.sof
......\........\...\chw.tan.rpt
......\........\...\chw.tan.summary
......\........\...\chw.vhd
......\........\...\chw.vwf
......\........\...\db
......\........\...\..\chw.asm.qmsg
......\........\...\..\chw.cbx.xml
......\........\...\..\chw.cmp.cdb
......\........\...\..\chw.cmp.hdb
......\........\...\..\chw.cmp.kpt
......\........\...\..\chw.cmp.logdb
......\........\...\..\chw.cmp.rdb
......\........\...\..\chw.cmp.tdb
......\........\...\..\chw.cmp0.ddb
......\........\...\..\chw.dbp
......\........\...\..\chw.db_info
......\........\...\..\chw.eco.cdb
......\........\...\..\chw.eds_overflow
......\........\...\..\chw.fit.qmsg
......\........\...\..\chw.hier_info
......\........\...\..\chw.hif
......\........\...\..\chw.map.cdb
......\........\...\..\chw.map.hdb
......\........\...\..\chw.map.logdb
......\........\...\..\chw.map.qmsg
......\........\...\..\chw.pre_map.cdb
......\........\...\..\chw.pre_map.hdb
......\........\...\..\chw.psp
......\........\...\..\chw.rtlv.hdb
......\........\...\..\chw.rtlv_sg.cdb
......\........\...\..\chw.rtlv_sg_swap.cdb
......\........\...\..\chw.sgdiff.cdb
......\........\...\..\chw.sgdiff.hdb
......\........\...\..\chw.signalprobe.cdb
......\........\...\..\chw.sim.hdb
......\........\...\..\chw.sim.qmsg
......\........\...\..\chw.sim.rdb
......\........\...\..\chw.sim.vwf
......\........\...\..\chw.sld_design_entry.sci
......\........\...\..\chw.sld_design_entry_dsc.sci
......\........\...\..\chw.syn_hier_info
......\........\...\..\chw.tan.qmsg
......\........\...\..\wed.zsf
......\........\corn
......\........\....\corn.asm.rpt
......\........\....\corn.done
......\........\....\corn.fit.rpt
......\........\....\corn.fit.smsg
......\........\....\corn.fit.summary
......\........\....\corn.flow.rpt
......\........\....\corn.map.rpt
......\........\....\corn.map.summary
......\........\....\corn.pin
......\........\....\corn.pof
......\........\....\corn.qpf
......\........\....\corn.qsf
......\........\....\corn.qws
......\........\....\corn.sof
......\........\....\corn.tan.rpt
......\........\....\corn.tan.summary
......\........\....\corn.vhd
......\........\....\db
......\........\....\..\corn.asm.qmsg
......\........\....\..\corn.cbx.xml
......\........\....\..\corn.cmp.cdb
......\........\....\..\corn.cmp.hdb
......\........\....\..\corn.cmp.kpt
......\........\....\..\corn.cmp.logdb
......\........\....\..\corn.cmp.rdb
......\........\....\..\corn.cmp.tdb
......\........\....\..\corn.cmp0.ddb
......\........\....\..\corn.dbp
......\........\....\..\corn.db_info
......\........\....\..\corn.eco.cdb
......\........\....\..\corn.fit.qmsg
......\........\....\..\corn.hier_info
......\........\....\..\corn.hif
......\........\....\..\corn.map.cdb
......\........\....\..\corn.map.hdb
    

CodeBus www.codebus.net