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- 2012-11-26
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Description: Proposed a use of (2,1,7) convolutional code+ QPSK modulation and demodulation of the IF program, and in Xilinx' s FPGA chip one million on implementation of the system. The system SNR to 6dB signal to noise ratio at about the rate may achieve more than 1Mbit/s, less than 10-5 bit error rate of data transmission.
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采用_2_1_7_卷积码_QPSK的中频调制解调系统的FPGA实现.kdh
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