FPGA_4FFT In accordance with the requirements of h

Title: FPGA_4FFT

Category:
Project Design
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File Size:
352kb
Update:
2012-11-26
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Uploaded by:
wangxiao3688

Description: In accordance with the requirements of high speed digital signal processing , the algorithmof radix O4 implemented with FPGA and the integrated architecture and butterfly unit are analyzed. With butterfly u2 nit input which is designed by parallel structure and the same address calculation , four operation codes the butterfly unit needs can be provided simultaneously to have the most data parallel and improve the speed of calculation. According to the rotation parameters memory regulation , the addresses of three rotation parame2 ters of butterfly unit are the same with simple style of address generation and similar input and output memo2 ries. The operating unit adopted is implemented by three complex calculation algorithm of multiplication si2 multaneously.

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基于FPGA的基_4FFT算法的硬件实现
...............................\基于FPGA的基_4FFT算法的硬件实现.pdf

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