BlockRAM xilinx cascade, using Xilinx primitive (n - CodeBus

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Title: BlockRAM

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
2kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
nnnmao

Description: xilinx BlockRAM cascade, using Xilinx primitive (non-IP Core), greater flexibility

Downloaders recently: [More information of uploader nnnmao]

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BlockRAM.v

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