Description: Using VHDL language pinball game, control baffle bounce on the screen to catch the ball. Show the output as a standard VGA signal, can be directly connected to VGA displays. QuartusII available in software downloaded to the FPGA to realize.
- [full_featured] - a graduate design of the FPGA using VHDL
- [verilog_lcd] - with Verilog HDL write on the LCD displa
- [vhdlvga] - writes with VHDL Language demonstrates t
- [wb_vga.tar] - vga display controller hardware realize
- [15693Demox] - 15693 high-frequency card reader program
- [VGA] - 1K30DE FPGA with written procedures, and
- [VGA] - FPGA to control the use of VGA display,
- [tft_cntlr_ref_v1_00_c] - TFT LCD controller VERILOG source code p
- [sditest] - Ep3c25 based on the altera sdi ip nuclea
- [11] - MATLAB bp
File list (Check if you may need any files):
Download