Description: High-speed SDRAM controller, and provide simulation testing procedures and more detailed documents.
- [Commandinterface] - SDRAM controller member Verilog code, or
- [VHDL] - Shanghai Jiaotong University Electronic
- [T4_sdram_control] - control FPGA Verilog language use SDRAM,
- [classify] - Chinese classification of the key techno
- [rake_mrc] - RAKE receiver to achieve the maximal rat
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