crc16_ccitt crc_table.c is for reset seed (0000) c

Title: crc16_ccitt

Category:
VHDL-FPGA-Verilog
Tags:
[C/C++] [源码]
File Size:
3.17kb
Update:
2008-10-13
Downloads:
1 Times
Uploaded by:
yztfwj

Description: crc_table.c is for reset seed (0000) crc_table_1.c is for reset seed (ffff) CRC16_D8_m.v is a verilog module of byte paralle crc.CRC16_D8_m_tb.v is the testbench file of above module.

Downloaders recently: [More information of uploader yztfwj]

To Search: crc verilog crc16 verilog testbench crc verilog testbench crc16-cci

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