Description: Prepared by addition VHDL four counters, QuartusII environment through authentication
- [COUNT10] - A decimal counter VHDL process, everyone
- [fifo8_8] - 8* 8 of the fifo data buffer of the VHDL
- [count] - EDA experiments using macro function mod
- [opnet] - Title: OPNET-based simulation modeling m
- [PlateReco] - Complete license plate location and reco
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