Description: the source is a high-speed parallel multiplier design source, development of software for MAX PLUS. with the importation of two symbols of binary-
To Search:
- [shiftregister] - a shift register written in VHDL, which
- [cla_vhd] - CLA of examples, including source code a
- [wbm] - algorithm using the symbols multiplier,
- [15_MUX41] - multiplier using VHDL coding, you may no
- [FM_AM] - a simple modulation example, on the AM,
- [shuzilvboqideyingjianshixian] - Digital Filter hardware, which can be di
- [16_multi] - 16* 16 multiplier symbols have the
- [mult] - err
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