Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: 串口verilog源代码 Download
 Description: 串口UARTverilog源代码。包括控制模块、收、发模块。程序全，功能简洁，包含Q2工程
 Downloaders recently: [More information of uploader huangjiajun1213]
 To Search: UART verilog
File list (Check if you may need any files):

CodeBus www.codebus.net