[VHDL-FPGA-Verilog] verilog fft_64_12

Description: radix-4,利用cordic算法实现复乘单元
Platform: | Size: 13243 | Author: mikehonour@126.com | Hits:

[VHDL-FPGA-Verilog] 三选一数据选择器

Description: 用VHDL语言编写
Platform: | Size: 492 | Author: 403531813@QQ.COM | Hits:

[VHDL-FPGA-Verilog] FFT_control

Description: de2 fft_control
Platform: | Size: 58352 | Author: 970130114 | Hits:

[VHDL-FPGA-Verilog] DDR（双速率）SDRAM控制器参考设计verilog代码

Description: DDR SDRAM reference design documentation
Platform: | Size: 895281 | Author: tony_gx@hotmail.com | Hits:

[VHDL-FPGA-Verilog] 512点FFTVerilog实现

Description: 关于FFT Verilog代码实现的源代码
Platform: | Size: 13030773 | Author: happyhongt@163.com | Hits:

[VHDL-FPGA-Verilog] 关于DDS的相位变化的VHDL程序

Description: 关于DDS的相位变化的VHDL程序
Platform: | Size: 1371614 | Author: gw81320965 | Hits:

[VHDL-FPGA-Verilog] Binary2BCD VHDL

Description:
Platform: | Size: 3652 | Author: chengrenwz@126.com | Hits:

[VHDL-FPGA-Verilog] Turbo VHDL

Description: VHDL源程序
Platform: | Size: 46569 | Author: adahwa | Hits:

[VHDL-FPGA-Verilog] 多功能数字钟设计

Description: 我做课程设计时候所设计出的数字钟电路，实现分、秒计时，异步复位、暂停功能，已经在板子上面实现。和大家分享，一起进步！
Platform: | Size: 182477 | Author: chenlu1986 | Hits:

[VHDL-FPGA-Verilog] CAN协议控制器的Verilog实现

Description: CAN协议控制器的Verilog实现
Platform: | Size: 38781 | Author: belong2568@163.com | Hits:

[VHDL-FPGA-Verilog] 2FSK/2PSK VHDL设计

Description: 2FSK/2PSK VHDL设计，包含原理与源码
Platform: | Size: 46703 | Author: imcth@yeah.net | Hits:

[VHDL-FPGA-Verilog] CPU设计

Description: 用VHDL设计的一个16为CPU，内有开发文档以及源代码
Platform: | Size: 402432 | Author: oliver_hildebrand@163.com | Hits: