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Description: 用于FPGA的Z变化算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。
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Size: 7571 |
Author: caesar |
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Description: 一个 16×8bit 的ROM程序包括程序的初始化。-A 16 × 8bit the ROM initialization procedures, including procedures.
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Size: 3072 |
Author: h13978699183 |
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Description: 实现jpeg图像解码功能。
代码设计思路：1, Reconstruct the Huffman/RLE stream to a sequence
2, Arrange the sequence to a matrix using the zigzag scanning backwards
3, Multiply the matrix by quantization table
4, Perform inverse DCT
5, Shift the values by +128
6, Transform back to RGB color space
-Realize jpeg image decoding capabilities. Code design: 1, Reconstruct the Huffman/RLE stream to a sequence2, Arrange the sequence to a matrix using the zigzag scanning backwards3, Multiply the matrix by quantization table
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Size: 186368 |
Author: 颜新卉 |
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Description: 用于FPGA的Z变化算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-脫脙脫脷FPGA渭脛Z 卤 盲 禄炉 脣茫 篓 渭脛HDL 卤 脿脗毛 拢 卢 掳 眉脌 篓 VHDL 录 掳 Verilog
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Size: 7168 |
Author: caesar |
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Description: altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序，已经过matlab 和modelsim
验证，文件中包含TESTBENCH ，直接可用-altera fpga verilog design table DCT-based search procedures and zigzag scanning procedures, and ModelSim matlab has been verified, the document contains TESTBENCH, directly available
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Size: 15400960 |
Author: alison |
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Description: Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
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Size: 494592 |
Author: student |
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Description: ZigZag Transform Used in Jpeg Convert IN VHDL LANGUAGE
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Size: 3072 |
Author: Mehdi Souri |
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