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[VHDL-FPGA-Verilog] Modelsim中文教程

Description: Modelsim中文教程,有３篇讲Modelsim的资料，对新手是个很好的参考资料-Modelsim Chinese guide, a three stresses Modelsim information, the rookie is a very good reference!
Platform: | Size: 970752 | Author: 温暖感 | Hits:

[VHDL-FPGA-Verilog] ADC0809

Description: adc0809的fpga时序电路接口程序-Sequential Circuits adc0809 the FPGA interface program
Platform: | Size: 196608 | Author: yc | Hits:

[VHDL-FPGA-Verilog] ADC0809

Description: adc0809数模转换芯片fpga控制程序
Platform: | Size: 57344 | Author: conanhfl | Hits:

[SCM] Proteus

Description: proteus是做单片机仿真的好工具,这个资料是我找了很久才找到的,并且在业界也得到了非常高的评价,希望对大家有所帮助-Proteus is doing a good tool for single-chip simulation, this information is looking for a long time before I found, and in the industry have been very high rating, I hope all of you to help
Platform: | Size: 481280 | Author: 秦乐 | Hits:

[OS program] 8086IP

Description: 开源CPU软核8086的源码,波兰版Verilog源码-8086 soft-core CPU revenue source, the Polish version of Verilog source code
Platform: | Size: 71680 | Author: 林丹 | Hits:

[Other] Proteus

Description: protus的人们必备，是从网络上摘录的经典-people must protus is extracted from the network on a classic
Platform: | Size: 705536 | Author: nanyuanqi | Hits:

[VHDL-FPGA-Verilog] fftipcore

Description: 实现fft的ip核，用vhdl语言实现。-Fft realize the ip nuclear, using VHDL language.
Platform: | Size: 31744 | Author: liu | Hits:

[Other] adc

Description: 实现MAX187单通道12位串行输出AD器件采样时序的生成。-use MAX187 to sample
Platform: | Size: 890880 | Author: 潘旺 | Hits:

[VHDL-FPGA-Verilog] VHDL_Hardware_Language

Description: vhdl硬件描述语言，对于进行FPGA、CPLD开发的人来说比较有用。-vhdl hardware description language is fundamental to the FPGA, CPLD development of more useful people.
Platform: | Size: 7931904 | Author: qiuxiaoxiang | Hits:

[VHDL-FPGA-Verilog] somethingaboutADC0809

Description: 8.4 ADC0809接口电路及程序设计 ADC0808/ADC0809资料； 基于VerilogHDL的ADC0809采样控制器设计； 基于VHDL语言的A_D采样控制器设计。 -8.4 ADC0809 interface circuit and program design ADC0808/ADC0809 information ADC0809 based on the sampling VerilogHDL controller design A_D language VHDL-based controller design for sampling.
Platform: | Size: 973824 | Author: 冯光 | Hits:

[VHDL-FPGA-Verilog] ADC0809

Description: ADC0809，完整的功能描述，每0.5秒采样一次，并显示出来。外置ADC0809芯片，-ADC0809, a complete functional description of each sampling time 0.5 seconds, and displayed. ADC0809 external chip
Platform: | Size: 82944 | Author: heshuiming | Hits:

[VHDL-FPGA-Verilog] main

Description: 交通信号灯　原代码 西安交通大学　电信学院　FPGA设计课下作业-Traffic lights of the original source, Xi' an Jiaotong University School of FPGA design course telecommunication operating under the
Platform: | Size: 1024 | Author: 唐霖 | Hits:

[Other Embeded program] 8051alarmclock

Description: A complete collection of a simple alarm clock with minimum compenents used and simulation in proteus The hardware is complete and practically implemented with 100 success.-A complete collection of a simple alarm clock with minimum compenents used and simulation in proteus The hardware is complete and practically implemented with 100 success.
Platform: | Size: 90112 | Author: sandeep | Hits:

[Embeded-SCM Develop] LEDbright-control

Description: 在proteus中设计的LED的亮度控制电路原理图以及程序代码。-In the proteus in the design of LED brightness control circuit diagram and program code.
Platform: | Size: 53248 | Author: fjb | Hits:

[SCM] Keilandproteus

Description: 这是关于单片机开发软件keil和proteus完美结合得教程，理论到实践-This is about developing software keil SCM and proteus were the perfect combination of tutorials, theory to practice
Platform: | Size: 1352704 | Author: fuxugang | Hits:

[VHDL-FPGA-Verilog] SAP1pond

Description: SAP1 Using VHDL instead of presenting in Proteus
Platform: | Size: 590848 | Author: CaST | Hits:

[Other] fsm

Description: finite state machine writing in VHDL using proteus software.
Platform: | Size: 13312 | Author: saltihie | Hits:

[Other] counter

Description: This source code for counter writing in VHDL using Proteus software-This is source code for counter writing in VHDL using Proteus software
Platform: | Size: 832512 | Author: saltihie | Hits:

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