Description: 这是一个基于mips-I结构的处理器,32bit,冯诺依曼结构-This is based on a MIPS- I structure of the processor, 32bit, von Neumann structure Platform: |
Size: 222208 |
Author:tsm998 |
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Description: MIPS处理器VHDL代码,实现加法,减法乘除等运算,可综合,-MIPS processor VHDL code, realize adder, subtraction multiplication and division and other operations can be integrated, Platform: |
Size: 6144 |
Author:陈丰 |
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Description: 使用verilog設計的MIPS處理器,mips處理機的模擬且可合成驗証-MIPS processor using the verilog design, mips processor synthesis of analog and can be verified Platform: |
Size: 4096 |
Author:張日 |
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Description: MIPS处理器的组员大作业,可以直接运行,提交,环境是quartus-MIPS processor crew great job, you can run directly, the author, the environment is quartusII Platform: |
Size: 3059712 |
Author:fan |
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Description: mips cpu的实现.MIPS是世界上很流行的一种RISC处理器。MIPS公司的R系列就是在此基础上开发的RISC工业产品的微处理器。这些系列产品为很多计算机公司采用构成各种工作站和计算 机系统。 -mips cpu implementation. MIPS is the world' s very popular as a RISC processor. MIPS company' s R series is based on the development of industrial products RISC microprocessor. These series of products for many computer companies used to create various workstations and computer systems. Platform: |
Size: 7025664 |
Author:汤龑鸣 |
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Description: 简化的单时钟循环VHDL处理器.可以运行一些简单的mips指令,例如add, sub, and, or, slt, beq and j. -A simplified single cycle processor in VHDL. This processor can continuously execute some simple MIPS instructions which are lw, sw, add, sub, and, or, slt, beq and j. Platform: |
Size: 191488 |
Author:糖醋鱼 |
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Description: 单周期的mips处理器设计,用vhdl语言实现各个模块的功能-Single-cycle mips processor design, using vhdl language functions of each module Platform: |
Size: 117760 |
Author:王晓强 |
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Description: MIPS CPU with Mulicycle Datapath. This is a custom RISC processor implemented to achieve the function of "lw, sw, add, sub, and, or, beq, j"
Mem.vhd - memory
buffer.vhd - buffer
ALUcon.vhd - Alu controller
pc.vhd - program counter
REG - registers-MIPS CPU with Mulicycle Datapath. This is a custom RISC processor implemented to achieve the function of "lw, sw, add, sub, and, or, beq, j"
Mem.vhd- memory
buffer.vhd- buffer
ALUcon.vhd- Alu controller
pc.vhd- program counter
REG- registers Platform: |
Size: 8192 |
Author:zi |
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Description: 10天实现OPENMIPS处理器-VHDL版[内有详细代码,testbench和设计文档,十天教你学会MIPS架构CPU设计]-10 days to achieve the OPENMIPS processor-VHDL version [within a detailed code, testbench and design documents, ten days to teach you to learn MIPS architecture CPU design] Platform: |
Size: 5006336 |
Author:zyy |
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