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[VHDL-FPGA-Verilog] watchdog.tar

Description: verilog编写的watchdog代码!请参考！-Verilog code watchdog prepared! please refer to!
Platform: | Size: 2048 | Author: 刘志刚 | Hits:

[VHDL-FPGA-Verilog] state_machine_watchdog

Description: 基于状态机的CPLD/FPGA看门狗程序 难能可贵-State machine based on the CPLD/FPGA valuable watchdog process
Platform: | Size: 650240 | Author: ld | Hits:

[OS program] Watchdog

Description: 基于ＶＨＤＬ语言，实用的看门狗功能设计程序-Based on the VHDL language, and practical watchdog function of the design process
Platform: | Size: 4096 | Author: 小涛 | Hits:

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