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[
DSP program
]
BASE-T0-VHDL-DSP
Description:
Platform:
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Size:
2048
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Author:
周成家
|
Hits:
[
VHDL-FPGA-Verilog
]
Tun2CNk2
Description:
FPGA实现DSP的Verilog 示例-FPGA realization of DSP-Verilog Example
Platform:
|
Size:
331776
|
Author:
wanghua
|
Hits:
[
VHDL-FPGA-Verilog
]
QAM
Description:
以QAM系统设计为例——介绍在FPGA中实现DSP算法-QAM system as an example to the design- introduced in the realization of DSP algorithms in FPGA
Platform:
|
Size:
165888
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Author:
陈文诚
|
Hits:
[
VHDL-FPGA-Verilog
]
DSP
Description:
FIR Digital Filter Design (DSP example) tested by Weijun Zhang, 04/2001 VHDL Data-Flow modeling KEYWORD: generate, array, range, constant and subtype- FIR Digital Filter Design (DSP example) tested by Weijun Zhang, 04/2001 VHDL Data-Flow modeling KEYWORD: generate, array, range, constant and subtype
Platform:
|
Size:
1024
|
Author:
mohamed
|
Hits:
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