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[Special Effects] Code_for_MedianFilter33

Description: 3x3中值滤波器的FPGA实现(VERILOG)-3x3 median filter FPGA implementation (VERILOG)
Platform: | Size: 53248 | Author: tom | Hits:

[VHDL-FPGA-Verilog] 3-3-median-filter

Description: verilog编写的适用于fpga的3x3模板中值滤波-verilog fpga prepared for the 3x3 median filter template
Platform: | Size: 51200 | Author: | Hits:

[VHDL-FPGA-Verilog] DE2_CCD_sobel

Description: verilog编写的适用于fpga的3x3模板sobel滤波-verilog fpga prepared for the 3x3 template sobel filter
Platform: | Size: 5596160 | Author: 彭青艳 | Hits:

[Windows Develop] 3Code_for_Medx

Description: 3x3中值滤波器的FPGA实现现(VERILOG)可直接使用。 -3x3 median filter FPGA implementation of the present (VERILOG) can be used directly.
Platform: | Size: 54272 | Author: zenghui411 | Hits:

[VHDL-FPGA-Verilog] mode3by3_generate_module

Description: 用verilog编写的3x3模块！用于图像处理算法中的中值滤波和边缘检测等等!-failed to translate
Platform: | Size: 933888 | Author: 张皓 | Hits:

[VHDL-FPGA-Verilog] juanji_3_3

Description: 自己写的3*3的高斯卷积模板，用Verilog在ISE上写的-Write your own 3x3 Gaussian convolution mask, using Verilog write on the ISE
Platform: | Size: 3945472 | Author: 刘恒建 | Hits:

[VHDL-FPGA-Verilog] 3x3均值滤波，完整verilog源码工程

Description: 直接下载到炫视开发板可处理HDMI 1080p视频，用到了线缓存和快速除法器
Platform: | Size: 182356 | Author: cloudkissme | Hits:

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