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[Program doc] uvm user guide, helpful

Description: uvm user guide, helpful
Platform: | Size: 1132954 | Author: xianglun@gmail.com | Hits:

[VHDL-FPGA-Verilog] uvm

Description: the Universal Verification Methodology (UVM) for creating SystemVerilog testbenches.
Platform: | Size: 7105536 | Author: hugo | Hits:

[Software Engineering] A_Practical_Guide_to(UVM)

Description: 介绍UVM最经典的数据，candence大师写的-a practical guide to adopting the univerdal verification methodloloyg
Platform: | Size: 3728384 | Author: gaowei | Hits:

[Other] uvm-1.1b.tar

Description: UVM 1.1b 验证方法学 systemverilog源代码- UVM 1.1b SystemVerilog Verification
Platform: | Size: 2775040 | Author: 王维 | Hits:

[VHDL-FPGA-Verilog] uvm-1.1d.tar

Description: UVM World 官方发布的UVM（通用验证方法学）的源代码，基于SystemVerilog，用于ASIC Verification。2013-03最新发布版本uvm-1.1d.tar.gz-The UVM World official release of the source code of the UVM (Universal Verification Methodology), based on SystemVerilog for ASIC Verification. 2013-03 latest release uvm-1.1d.tar.gz
Platform: | Size: 3214336 | Author: 吴杉 | Hits:

[DSP program] uvm

Description: UVM验证平台的介绍，在验证方面效率由于systemverilog。-UVM verification platform introduced in verification efficiency due systemverilog.
Platform: | Size: 1097728 | Author: 孙鹏 | Hits:

[Other] uvm-1.1c.tar

Description: UVM test bench source code for verilog development
Platform: | Size: 2778112 | Author: murali | Hits:

[Other] UVM-practical-guide

Description: 一份介绍UVM验证方法学的经典实用教程，对UVM的基本语法进行生动地描述，并给出相应的实例讲解，对初学者有很大帮助-UVM verification methodology introduces a classic practical tutorial on basic grammar UVM were vividly described, and the corresponding examples to explain, are very helpful for beginners
Platform: | Size: 5633024 | Author: 代成 | Hits:

[Other systems] uvm-1.1d

Description: uvm 源代码开发，基于此可以实现芯片验证加速和验证充分保证-uvm system verilog based code
Platform: | Size: 3696640 | Author: 李辉 | Hits:

[Other] uvm-cookbook

Description: uvm 入门经典书籍，IC验证必读。详细介绍UVM的高级用法。深入浅出。-uvm cookbook
Platform: | Size: 4850688 | Author: Harry | Hits:

[Software Engineering] uvm

Description: UVM例子，自己写的平台，需要的同学可以参照进行修改，也可以对应UVM1.1源码分析书籍查看-UVM demo made by myself，anyone want to learn UVM can use it as a refrence doc
Platform: | Size: 6330368 | Author: 小灯 | Hits:

[Other] uvm-1.2.tar

Description: UVM 1.2 golden code, -code for UVM,
Platform: | Size: 2463744 | Author: 陈炳军 | Hits:

[Other] UVM

Description: uvm验证方法学入门。step by step，适合IC验证人员入门-uvm verification methodology started. step by step, for IC verification personnel entry
Platform: | Size: 9593856 | Author: luojun | Hits:

[Documents] UVM-report

Description: UVM Report and UVM Config UVM Report and UVM Config -UVM Report and UVM Config UVM Report and UVM Config UVM Report and UVM Config
Platform: | Size: 2048 | Author: Ananda Murali | Hits:

[Other] UVM-Factory

Description: UVM Factory UVM Factory UVM Factory-UVM Factory UVM Factory UVM Factory UVM Factory UVM Factory
Platform: | Size: 3072 | Author: Ananda Murali | Hits:

[Other] UVM-Transcation

Description: UVM Transaction UVM Transaction -UVM Transaction UVM Transaction UVM Transaction UVM Transaction
Platform: | Size: 2048 | Author: Ananda Murali | Hits:

[Other] uvm-crc-test

Description: UVM简单例程，DUT为Verilog小程序。(UVM simple routine, DUT is Verilog applet.)
Platform: | Size: 5120 | Author: wenxulyu | Hits:

[Other] uvm-cookbook-complete-verification-academy

Description: UVM cookbook from mentors
Platform: | Size: 5153792 | Author: DUBABBA | Hits:

[Other] UVM示例平台

Description: 一个UVM完整组件的测试平台，以一个简单的路由器作为例子进行UVM测试(A test platform for UVM complete components, taking a simple router as an example for UVM testing.)
Platform: | Size: 114688 | Author: donnyli | Hits:

[VHDL-FPGA-Verilog] UVM验证平台搭建

Description: 搭建uvm验证平台,通用验证平台结构和搭建流程介绍(How to build a common UVM verification platform?An easy and useful method is instroduced here.)
Platform: | Size: 155648 | Author: cicighy | Hits:
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