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Description: 文档详尽、已验证的UART工程，含有testbench文件。采用VHDL、Verilog语言编写。-Detailed documentation, has proven UART works with testbench file. Using VHDL, Verilog language.
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Size: 224256 |
Author: robin |
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Description: SCI2 -B channel of rx62n in asynchronous mode
Platform: |
Size: 226304 |
Author: barge |
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