Description: 开源的基于SystemC的模拟器，可以模拟ARM CPU, Cache, DDR，NOR, NAND, 时序和功耗均可以正确模拟。-This simulator is a cycle-accurate system-level energy and timing simulator. Developed by Embedded Low-Power Laboratory, Seoul National University. The simulator’s underlying kernel is OSCI SystemC 2.2.0. All of the hardware modules satisfies the OSCI standards.
The simulator is composed of a CPU, cache, and memory components including DDR SDRAM, MLC NOR Flash, MLC NAND Flash, SRAM. Each memory components have it’s own memory model, which enables cycle-accurate power consumption estimation of the devices. Master and slave SystemC IPs are connected through AMBA AHB CLI (Cycle-Level Interface). You will get energy trace files for each memory devices. You will get cycle-accurate performance evaluation results CPU cycle counts information, and cache hit/miss ratio on console. Also, you can get trace files for memory devices.
The simulator exhibits performance over 500 K instructions/sec, which is fairly high for a cycle-accurate system-level simulator.
The simulator’s source co Platform: |
Size: 4886528 |
Author:Archie |
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Description: 0.最简单的SystemC程序：hello, world.
1.用SystemC实现D触发器的例子，同时也演示了如何生成VCD波形文件。
2.用SystemC实现同步FIFO的例子。这个FIFO是从同文件夹的fifo.v（verilog代码）翻译过来的。
3.如何在SystemC中实现延时（类似verilog中的#time）的例子。
4.SystemC文档《User Guide》中的例子。注意和文挡中稍有不同的是修改了packet.h文件，重载了=和<<操作符。这其实也演示了在sc_signal中如何使用用户自定义的struct。
5.构造函数带参数的例子。
6.轮转仲裁的例子。
7.使用类摸板的例子。
8.如何在模块中包含子模块。
9.SystemC的Transaction级验证示例。
10.如何trace一个数组
11.SystemC中使用测试向量文件输入的例子。
12.SystemC采用UDP/TCP通信的例子。
13.Cadence的ncsc的例子。
-0 most simple SystemC program: hello, world.
A D flip-flop using SystemC example also demonstrates how to generate VCD waveform files.
Synchronous FIFO example using SystemC. FIFO is from the same folder fifo.v (Verilog code) translated.
Delay (similar to verilog# time). In SystemC examples.
4.SystemC document the "User Guide" in the example. Note the slightly different cultural block is modified the packet.h file, reload = << operator. In fact, this also demonstrates how to use user-defined struct in sc_signal.
Constructor with parameters example.
(6) examples of web arbitration.
7. The class Moban examples.
8 module contains a sub-module.
9.SystemC of Transaction-Level Verification example.
10 How to trace an array
11.SystemC use the example of the test vector file input.
12.SystemC using the example of the UDP/TCP communication.
Examples of 13.Cadence the ncsc. Platform: |
Size: 532480 |
Author:sdd |
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Search - systemC transaction D