Welcome![Sign In][Sign Up]
Location:
Search - sopc seven segment

Search list

[VHDL-FPGA-Verilogshuzixitongshiyan

Description: 这个给QuartusII初学者用的,里面很清楚的通过几个例子来告诉怎么运用QuartusII. 实验1:Quartus入门 实验2:简单的组合逻辑电路设计 实验3:七段数码管显示 实验4:BCD码显示及运 实验5:触发器和计数器 实验6:存储器的设计 实验7:基于DE2 的SOPC系统开发附录:-This QuartusII beginners to use, which is very clear through several examples to tell how the use of QuartusII. Experiment 1: Quartus entry Experiment 2: a simple combinational logic circuit design of experiment 3: Seven-Segment LED display experiment 4: BCD code display and shipped experiment 5: flip-flops and counters experiment 6: the design of memory test 7: Based on DE2 the SOPC System Development Appendix:
Platform: | Size: 754688 | Author: yulieyar | Hits:

[VHDL-FPGA-Verilogcalculator

Description: 课设一个,又臭又长,是一个用verilog编写的计算器,对应革新科技的某个sopc开发平台,键盘会扫描,七段二极管会译码且是并行输出,上传的是整个工程,在该开发平台上基本正常,主程序段编写的较为幼稚,希望大家多多扔玉。注:主程序段预计做八位计算器,后来因为实验平台只有六个数码管无奈之下后两位没接,主程序中的ac有问题,在开发平台上没效果,压缩包里的图是主程序在quartus下的仿真图,开发环境是quartus,不知应选哪项。最后:初次上传欢迎指正 -Set up a class, but also smell and long, is a calculator written using verilog, corresponding to a sopc innovative science and technology development platform, the keyboard scan, seven-segment LED will be parallel decode and output, upload the entire project, In the normal development platform, the main program segment written in a more naive, I hope Members can throw jade. Note: The main program segment is expected to make eight calculators, and later because the experimental platform is only six digits after the two did not desperation then, the main program of the ac problems did not result in the development of platforms, compressed bag of Figure is the main program under the simulation diagram in quartus, development environment is quartus, do not know which of the election. Last: initial upload please correct me
Platform: | Size: 10809344 | Author: raven | Hits:

CodeBus www.codebus.net