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Description: 正弦波在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-sine wave in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
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Size: 6144 |
Author: zqh |
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Description: 用VHDL语言编写的DDS正弦函数发生器-Using VHDL language DDS sine function generator
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Size: 500736 |
Author: cfsword |
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Description: 用cordic算法来实现求解正弦,余弦及反正切的FPGA实现原代码-CORDIC algorithm used to achieve the solution of sine, cosine and tangent of the FPGA to achieve the original code
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Size: 427008 |
Author: 汤文森 |
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Description: 用VerilogHDL实现的产生Sine波形全部程序
个人验证后收藏的。-VerilogHDL have achieved with Sine Waveform all procedures after the collection of personal authentication.
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Size: 3566592 |
Author: 孙浩 |
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Description: 实现4种常见波形正弦、三角、锯齿、方波(A、B)的频率、幅度可控输出(方波
A的占空比也是可控的),可以存储任意波形特征数据并能重现该波形,还可完成
各种波形的线形叠加输出。
-Realize four kinds of common sine wave, triangle, sawtooth, square wave (A, B) the frequency, magnitude controllable output (square wave A, is also a controllable duty cycle), can store arbitrary waveform feature data and can reproduce the waveform, but also completed a variety of linear superposition of the output waveform.
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Size: 9216 |
Author: zhanyi |
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Description: VHDL采用自然采样法写的SPWM,里面有正弦表,可以通过外接输入正弦波和三角波的频率。
-VHDL using written natural sampling SPWM, there are sine table, you can enter through the external sinusoidal and triangular wave frequency.
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Size: 7168 |
Author: zyb |
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