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[Communication伪随机序列

Description: 线形反馈移位寄存器(LFSR)是数字系统中一个重要的结构,本程序可以自动产生AHDL,VHDL,Verilog的源代码及电路原理图。程序可以运行在win98/2000/NT平台-linear feedback shift register (LFSR) digital system is an important structure, the process can be automatically generated AHDL, VHDL, Verilog source code and circuit schematics. Procedures can run on platforms win98/2000/NT
Platform: | Size: 162816 | Author: 夏沫 | Hits:

[Windows Develop移位寄存器

Description: 移位寄存器,VHDL编写,具有很高的参考价值~-a shift register written in VHDL, which has very high reference value.
Platform: | Size: 1024 | Author: | Hits:

[Other时序逻辑:VHDL实例---移位寄存器

Description: 时序逻辑种类:VHDL实例---移位寄存器-sequential logic types : VHDL examples--- Shift Register
Platform: | Size: 2048 | Author: 张洪 | Hits:

[DocumentsShiftRegister

Description: Structural Description of an 8-bit Shift Register-Structural Description of an 8-bit Shift R egister
Platform: | Size: 1024 | Author: 刘思雄 | Hits:

[source in ebookC_9

Description: 100个经典vhdl编程实例, 第1例 带控制端口的加法器 第2例 无控制端口的加法器 第3例 乘法器 第4例 比较器 第5例 二路选择器 第6例 寄存器 第7例 移位寄存器 第8例 综合单元库 第9例 七值逻辑与基本数据类型 第10例 函数 第11例 七值逻辑线或分辨函数 第12例 转换函数 第13例 左移函数 第14例 七值逻辑程序包 第15例 四输入多路器...... -100 vhdl classical programming examples, No. 1 is the control port Adder first two cases of uncontrolled port Adder No. 3 Multiplier first four cases compared with the first five cases 2 Lu choice for the first six cases Register No. 7 cases shift register first eight cases consolidated for the first module nine cases seven-valued logic and basic data types No. 10 No. 11 cases function seven-valued logic function or defective Line No. 12 conversion functions No. 13 bits function section 14 cases 7 logic package No. 15 cases four multi-input devices ......
Platform: | Size: 336896 | Author: | Hits:

[Othercrc_lsfr

Description: 介绍crc与带反馈的线性移位寄存器(lfsr) 的原理(英文)-crc with the band introduced a linear feedback shift register (lfsr) Principle (English)
Platform: | Size: 932864 | Author: hunter | Hits:

[Othershift8

Description: 8 位移位寄存器 VHDL程序 VHDL程序 VHDL程序-8-bit shift register VHDL procedures VHDL procedures VHDL procedures
Platform: | Size: 197632 | Author: 周辉 | Hits:

[CA authcode

Description: 现行反馈移位寄存器算法.通过这个算法可以生成一些线性移位寄存器的输出序列-Current feedback shift register algorithm. With this algorithm can generate some of the output of linear shift register sequence
Platform: | Size: 4096 | Author: 猪华 | Hits:

[matlabcx

Description: 利用Matlab编写求取4级移位寄存器的M序列 设初始序列为:1 1 1 1 通过一个四级的移位寄存器,其中在第三级有负反馈(一个模二加法),即将序列的第三位和第四位相加(如序列1 1 1 1经移位寄存器第一次移位后为0 1 1 1)的值再赋到第一位. 序列的周期为16.-The use of Matlab to prepare to strike four of the M shift register sequence based initial sequence as follows: 1 1 1 1 4 through a shift register, which in the third grade there is negative feedback (one-mode two adder), the upcoming series third and fourth combined (such as the sequence 1 1 1 1 by the shift register after the first shift for the 0 1 1 1) the value given to the first again. The cycle sequence was 16.
Platform: | Size: 1024 | Author: 张宇 | Hits:

[VHDL-FPGA-Verilogshift

Description: 移位寄存器,异步清零,异步置数,左移右移可控,具有循环移位功能-Shift Register, Asynchronous Clear, asynchronous purchase the number of controllable left shifted to right with a cyclic shift function
Platform: | Size: 197632 | Author: 郭明 | Hits:

[VHDL-FPGA-Verilogshift_register

Description: -- DESCRIPTION : Shift register -- Type : univ -- Width : 4 -- Shift direction: right/left (right active high) -- -- CLK active : high -- CLR active : high -- CLR type : synchronous -- SET active : high -- SET type : synchronous -- LOAD active : high -- CE active : high -- SERIAL input : SI-- DESCRIPTION: Shift register- Type: univ- Width: 4- Shift direction: right/left (right active high )---- CLK active: high- CLR active: high- CLR type: synchronous-- SET active: high- SET type: synchronous- LOAD active: high- CE active: high- SERIAL input: SI
Platform: | Size: 1024 | Author: sanshanchuns | Hits:

[VHDL-FPGA-VerilogLFSR

Description: 自动生成线形反馈移位寄存器的各种HDL源代码和原理图的工具-Automatic generation of linear feedback shift register of a variety of HDL source code and schematic tools
Platform: | Size: 162816 | Author: zx | Hits:

[matlabfcsr

Description: 伪随机序列产生器-代进位反馈移位寄存器,matlab 原代码。-Pseudo-random sequence generator- on behalf of binary feedback shift register, matlab source code.
Platform: | Size: 1024 | Author: 李辛 | Hits:

[matlabffcsr

Description: 伪随机序列产生器-filtered 代进位反馈移位寄存器,matlab 原代码。-Pseudo-random sequence generator-filtered on behalf of binary feedback shift register, matlab source code.
Platform: | Size: 1024 | Author: 李辛 | Hits:

[VHDL-FPGA-Verilogshifter

Description: 8位双向移位寄存器: 实现串行数据与并行数据的转换,移位寄存数据功能的-8-bit bi-directional shift register: the realization of serial data and parallel data conversion, data storage function of displacement
Platform: | Size: 45056 | Author: 罗子 | Hits:

[GIS programshift-register-sequences

Description: 一本介绍产生移位寄存器序列的经典书籍!欢迎下载阅读-Introduce a shift register sequence generated classic books! Welcome to download reading
Platform: | Size: 1974272 | Author: 李俊 | Hits:

[VHDL-FPGA-Verilogregister-vcode

Description: shift register verilog code
Platform: | Size: 6144 | Author: praveen | Hits:

[VHDL-FPGA-VerilogShift-register

Description: 两种移位寄存器——通用和桶形移位寄存器,用硬件描述语言Verilog编写,适合初学者。-Two kinds of shift register- common and barrel shift register in Verilog hardware description language, suitable for beginners
Platform: | Size: 2048 | Author: 李菲 | Hits:

[OtherShift Register_0906

Description: 8 bit shift register
Platform: | Size: 4096 | Author: SamTseng | Hits:

[Com PortShift

Description: ASM code for shift register
Platform: | Size: 1298432 | Author: Sintu123 | Hits:
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