Description: 这是一个通用可编程接口的Verilog代码，可以设置触发条件，设置为电平方式、边沿方式。可以屏蔽不用的口。-This is a general programmable interface Verilog code, you can set a trigger condition is set to level the way the edge of the way. Can not shield the mouth. Platform: |
Size: 9216 |
Author:kristing |
Hits:
Search - port_8255_and_interrupt vhdl