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[VHDL-FPGA-Verilog] PINPAN

Description: 乒乓游戏 ，led流水灯控制乒乓球，按键控制甲方已方操作。详细说明看readme-ping-pong game, led lights to control water table tennis, has been chosen to control keys to operate. Details see readme
Platform: | Size: 4096 | Author: 张建 | Hits:

[VHDL-FPGA-Verilog] pingpang

Description: 实现乒乓缓存，用verilog语言编写！-Realize cache ping-pong, using Verilog language!
Platform: | Size: 165888 | Author: zhl | Hits:

[assembly language] bb

Description: 乒乓结构的verilog程序，风格相当好。大家赶紧 下了啊。-Verilog procedural ping-pong structure, style pretty good. Under the U.S. quickly, ah.
Platform: | Size: 460800 | Author: 谢桂辉 | Hits:

[Other] ddpi_tx

Description: verilog语言编写的一个接口文件，使用乒乓ram-verilog language of an interface file, use the ping-pong ram
Platform: | Size: 1024 | Author: yaop | Hits:

[Other] pingpong

Description: 在DE2开发板上实现的一个简单乒乓球的程序。开发语言verilog-In the DE2 development board to achieve a simple ping-pong process. Development language verilog
Platform: | Size: 2209792 | Author: xiaowant | Hits:

[VHDL-FPGA-Verilog] ping_pong_buffer

Description: 用寄存器来实现乒乓缓存(Verilog HDL)-Ping-pong with the register to achieve cache (Verilog HDL)
Platform: | Size: 36864 | Author: 小强 | Hits:

[VHDL-FPGA-Verilog] Verilog_pingpang

Description: 其实乒乓操作用面积换速度，本文件是用verilog实现乒乓操作-In fact, with an area for ping-pong operation speed, this document is to achieve pong operation verilog
Platform: | Size: 51200 | Author: Tom | Hits:

[Other] NandBuffer

Description: verilog编写，含三路正弦信号发生器，三路数据乒乓缓存模块。乒乓缓存读写控制采用三段式状态机实现。-The project contains a 3-channel sine generator and a 3-channel ping-pong buffer which is written in verilog. The write and read control of buffer is implemented in 3-segment FSM.
Platform: | Size: 8192 | Author: shanhuancui | Hits:

[FlashMX] niosII_hw_dev_tutorial

Description: 在DE2开发板上实现的一个简单乒乓球的程序。开发语言-verilog-In the DE2 development board to achieve a simple ping-pong process. Development language verilog
Platform: | Size: 13427712 | Author: wanganping | Hits:

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