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Description: 这是一片关于PLX公司PCI express芯片的方案和对PCI express系统的简单介绍-This is a company on the PLX PCI Express chip program and PCI Express system to a simple briefing
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Size: 6973894 |
Author: 马欣 |
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Description: 这是关于PCI最新规格PCIExpress的解析-This is the latest PCI specifications on the analytic PCIExpress
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Size: 581217 |
Author: 刘先生 |
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Description: 2001年春季的IDF上Intel正式公布PCI Express,是取代PCI总线的第三代I\\O技术,也称为3GIO。该总线的规范由Intel支持的AWG(Arapahoe Working Group)负责制定。2002 年4月17日,AWG正式宣布3GIO 1.0规范草稿制定完毕,并移交PCI-SIG进行审核。开始的时候大家都以为它会被命名为Serial PCI(受到串行ATA的影响),但最后却被正式命名为PCI Express。2006年正式推出Spec2.0(2.0规范)
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Size: 42609 |
Author: 都上课 |
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Description: PCIExpress数据链路层缓冲器结构的改进
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Size: 572985 |
Author: 王廷龙 |
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Description: PCIE协议,英文版。绝对真实好用,包括物理层链路层系统软件层,内容详细。
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Size: 1933368 |
Author: 陈杰 |
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Description: pci express spec for people need this
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Size: 1135831 |
Author: testsb |
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Description: 这是一片关于PLX公司PCI express芯片的方案和对PCI express系统的简单介绍-This is a company on the PLX PCI Express chip program and PCI Express system to a simple briefing
Platform: |
Size: 6973440 |
Author: 马欣 |
Hits:
Description: 这是关于PCI最新规格PCIExpress的解析-This is the latest PCI specifications on the analytic PCIExpress
Platform: |
Size: 580608 |
Author: 刘先生 |
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Description: 2001年春季的IDF上Intel正式公布PCI Express,是取代PCI总线的第三代I\O技术,也称为3GIO。该总线的规范由Intel支持的AWG(Arapahoe Working Group)负责制定。2002 年4月17日,AWG正式宣布3GIO 1.0规范草稿制定完毕,并移交PCI-SIG进行审核。开始的时候大家都以为它会被命名为Serial PCI(受到串行ATA的影响),但最后却被正式命名为PCI Express。2006年正式推出Spec2.0(2.0规范)-err
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Size: 41984 |
Author: 都上课 |
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Description: PCIExpress数据链路层缓冲器结构的改进-PCIExpress data link layer buffer structure improvement
Platform: |
Size: 572416 |
Author: 王廷龙 |
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Description: PCIE协议,英文版。绝对真实好用,包括物理层链路层系统软件层,内容详细。-PCIE agreement, the English version. Absolutely true-to-use, including the physical layer link layer system software layer, the content in detail.
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Size: 1933312 |
Author: 陈杰 |
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Description: xilinx BMD ver 10 pciexpress testbench for master design
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Size: 15360 |
Author: kventin |
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Description: pci express spec for people need this
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Size: 1135616 |
Author: tj |
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Description: PCIExpress系统架构,详细描述了PCIExpress总线标准,英文原版图书。-PCIExpress system architecture, a detailed description of PCIExpress bus standard, the English original book.
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Size: 13181952 |
Author: wcm |
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Description: 赛灵思Spartan_6FPGA针对低功耗高速速互连实现PCIExpre-Xilinx Spartan_6FPGA high-speed interconnect for low power realization of PCIExpress
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Size: 476160 |
Author: 朱远 |
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Description: 基于PCI+Express总线的数据采集设备实现-PCI+ Express bus based data acquisition devices
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Size: 411648 |
Author: bj |
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Description: PCIExpress的高速数据传输系统设计PCIExpress design of high-speed data transmission system-PCIExpress design of high-speed data transmission system
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Size: 370688 |
Author: sis |
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Description: PCIExpress数据链路层缓冲器结构的改进-PCIExpress data link layer buffer structure improvement
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Size: 591872 |
Author: gend |
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Description: pciexpress的downstreamsim仿真-pciexpress the downstreamsim Simulation
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Size: 608256 |
Author: 王刘 |
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Description: 8B10B是应用最广泛的编码技术。它被用于串行连 接SCSI、串行ATA、光纤链路、吉比特以太网、XAUI(10吉比特接口)、PCIExpress总线、InfiniBand、 SeriaRapidIO、HyperTransport总线以及IEEE1394b接口(火线)技术中。-8b/10b has been widely adopted by a variety of high speed data communication standards
used today and should prove ever more useful for FPGA-based designs as clock speeds and
I/O capabilities increase.
8b/10b has been widely adopted by a variety of high speed data communication standards
used today and should prove ever more useful for FPGA-based designs as clock speeds and
I/O capabilities increase.
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Size: 3072 |
Author: gg |
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