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[VHDL-FPGA-Verilog] video_from_opencore

Description: 全电视信号编码器，verilog的，看看有借鉴价值否？-video signal encoder, Verilog, to see whether the reference value?
Platform: | Size: 152576 | Author: 12 | Hits:

[assembly language] sine

Description: 用verilog语言编的正弦波发生器，可以用QuartusII来打开这个源码，也可以转换成VHDL语言-Verilog language prepared by the sine wave generator can be used QuartusII to open the source code can also be converted into VHDL language
Platform: | Size: 104448 | Author: 雨孩 | Hits:

[VHDL-FPGA-Verilog] HC164

Description: 用verilog写的HC164的驱动程序，参考了Xilinx的经典算法，做了一点改进~~~很通用，是初学verilog以及FPGA开发很有用的一个程序！
Platform: | Size: 3072 | Author: 屠宁杰 | Hits:

[VHDL-FPGA-Verilog] arbiter

Description: 一个用verilog编写的总线仲裁程序。多个设备共享总线，不同设备的优先级是变化的，保证每个设备都有公平的使用总线的机会。-Verilog prepared a bus with arbitration proceedings. Multiple devices share the bus, the priority of different devices is changing to ensure that each device will have a fair opportunity to use the bus.
Platform: | Size: 3072 | Author: bao rui | Hits:

[VHDL-FPGA-Verilog] OR1200_verilog

Description: or1200开源risc cpu的verilog描述实现，cpu源代码分析与芯片设计一书的源码-or1200 open source Verilog description of the risc cpu realize, cpu source code analysis and chip design source book
Platform: | Size: 204800 | Author: yu | Hits:

[Embeded-SCM Develop] I2C

Description: Verilog实现的I2C协议，直接在ISE下打开就可以-Verilog implementation I2C protocol to open directly in the ISE can be
Platform: | Size: 212992 | Author: Roy | Hits:

[Com Port] UART

Description: Verilog实现的UART程序，用ISE打开工程文件即可-Verilog implementation UART program, open the project file with the ISE can be
Platform: | Size: 22528 | Author: Roy | Hits:

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