Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - opb

Search list

[Other resource] P4_PPC_SDRAM_Reference_Design

Description: SDRAM 参考设计:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief description of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge · BlockRAM Memory Controller · SDRAM Controller · Two GPIO ports · A UART Port · External SDRAM
Platform: | Size: 33819 | Author: 庞志勇 | Hits:

[Other resource] my_zbt_controller

Description: ZBT内存控制器.支持OPB总线。VHDL源码
Platform: | Size: 1363 | Author: 吕奔 | Hits:

[Other resource] opb_wb

Description: 这是一个连通OPB和Wishbone Bus的Bridge, 能够让OPB与开源的Wishbone Bus连接通信， 从而使用基于Wishbone的许多开源IP Core
Platform: | Size: 23535 | Author: 古月 | Hits:

[Embeded-SCM Develop] opb_psram_controller.tar

Description: opb接口sdram控制器源码，标准参考设计，verilog语言
Platform: | Size: 6234 | Author: 范俊 | Hits:

[Other resource] lab3mb

Description: 添加自定制IP实验，这个实验介绍如何运用添加外设向导工具：Creat/Import Peripheral 为系统添加自定制 OPB 外设 IP。
Platform: | Size: 2190912 | Author: jie | Hits:

[Other resource] lab4mb

Description: 创建基本应用程序，本实验指导我们通过处理器创建一个基本的应用程序。应用程序将 控制Spartan-3E starter kit上的LEDs。 你将添加一个 OPB BRAM 控制器，和修改OPB BRAM中原有的连接部分插入文本。最后你将会发现系统就像你当初设计的一样运行。
Platform: | Size: 1856817 | Author: jie | Hits:

[VHDL-FPGA-Verilog] opb_ac97_v2_00_a

Description: 基于FPGA与LM4550B的AC97软声卡VHDL语言驱动，版本2.0-FPGA-based soft and LM4550B the AC97 sound card driver VHDL language, version 2.0
Platform: | Size: 66560 | Author: 张力 | Hits:

[VHDL-FPGA-Verilog] opb_ps2_dual_ref_v1_00_a

Description: 基于Xilinx FPGA实现PS2键盘鼠标接口。版本1.0-Based on Xilinx FPGA realize PS2 keyboard and mouse interface. Version 1.0
Platform: | Size: 16384 | Author: 张力 | Hits:

[Software Engineering] P4_PPC_SDRAM_Reference_Design

Description: SDRAM 参考设计:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief description of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge · BlockRAM Memory Controller · SDRAM Controller · Two GPIO ports · A UART Port · External SDRAM-SDRAM reference design: mainly include The following figure shows a high-level block diagram for this reference design followed by a briefdescription of each sub-section. The design consists of: PowerPC processor PLB-OPB bridge BlockRAM Memory Controller SDRAM Controller Two GPIO ports A UART Port External SDRAM
Platform: | Size: 33792 | Author: 庞志勇 | Hits:

[VHDL-FPGA-Verilog] my_zbt_controller

Description: ZBT内存控制器.支持OPB总线。VHDL源码-ZBT memory controller. Support the OPB bus. VHDL source
Platform: | Size: 1024 | Author: 吕奔 | Hits:

[VHDL-FPGA-Verilog] opb_wb

Description: 这是一个连通OPB和Wishbone Bus的Bridge, 能够让OPB与开源的Wishbone Bus连接通信， 从而使用基于Wishbone的许多开源IP Core-This is a Wishbone Bus connectivity OPB and the Bridge, that allows OPB and the Wishbone Bus to connect the open source communications, and thus the use of Wishbone s many open-source-based IP Core
Platform: | Size: 23552 | Author: 古月 | Hits:

[Embeded-SCM Develop] opb_psram_controller.tar

Description: opb接口sdram控制器源码，标准参考设计，verilog语言-OPB SDRAM controller source interface, the standard reference design, verilog language
Platform: | Size: 6144 | Author: 范俊 | Hits:

[Other] lab3mb

Description: 添加自定制IP实验，这个实验介绍如何运用添加外设向导工具：Creat/Import Peripheral 为系统添加自定制 OPB 外设 IP。-Add a custom IP experiment, this experiment describes how to use tools to add peripherals Wizard: Creat/ImportPeripheral for the system to add customized OPB peripheral IP.
Platform: | Size: 2190336 | Author: jie | Hits:

[Other] lab4mb

Description: 创建基本应用程序，本实验指导我们通过处理器创建一个基本的应用程序。应用程序将 控制Spartan-3E starter kit上的LEDs。 你将添加一个 OPB BRAM 控制器，和修改OPB BRAM中原有的连接部分插入文本。最后你将会发现系统就像你当初设计的一样运行。
Platform: | Size: 1856512 | Author: jie | Hits:

[VHDL-FPGA-Verilog] opb_lcd_controller_v1_00_a

Description: spartan3系列fpga opb模式下lcd液晶屏控制代码-spartan3 Series fpga opb mode lcd LCD screen control code
Platform: | Size: 5120 | Author: 刘佳 | Hits:

[Software Engineering] MicroBlazeprocessors

Description: 利用 OPB 定制外设连接 LCD 和 MicroBlaze 处理器-Custom OPB peripheral connectivity using LCD and MicroBlaze processors
Platform: | Size: 503808 | Author: luxh | Hits:

[VHDL-FPGA-Verilog] opb_vga

Description: 一个EDK下的用户IP核，进行OPB总线到VGA的转换-EDK under a user IP core, the OPB bus to VGA conversion
Platform: | Size: 12288 | Author: 曹晶 | Hits:

[VHDL-FPGA-Verilog] mbtutorial

Description: This tutorial guides you through the process of using Xilinx Embedded Development Kit (EDK) software tools, in which this tutorial will use the Xilinx Platform Studio (XPS) tool to create a simple processor system and the process of adding a custom OPB peripheral (an 32-bit adder circuit) to that processor system by using the Import Peripheral Wizard.
Platform: | Size: 1451008 | Author: praveen | Hits:

[2D Graphic] Developing_GUIs_in_C++

Description: we’ve successfully developed a simple GUI interface, using only a few lines of code. The major factor which works here is the entire class structure is re-usable, and can be applied to build a lot of other different User Interfaces too. The reader can try out his own GUI applications using this model and code structure to get a real-world picture of the OPB model.- we’ve successfully developed a simple GUI interface, using only a few lines of code. The major factor which works here is the entire class structure is re-usable, and can be applied to build a lot of other different User Interfaces too. The reader can try out his own GUI applications using this model and code structure to get a real-world picture of the OPB model.
Platform: | Size: 12288 | Author: Abhijeetrao | Hits:

[Embeded Linux] xapp913

Description: Reference System: OPB CAN Controller
Platform: | Size: 100352 | Author: bouthouri | Hits:
« 12 »

CodeBus www.codebus.net