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[OS Develop] Threadx-SourceCode

Description: ThreadX是优秀的硬实时操作系统，适用于深嵌入式应用中，具有规模小、实时性强、可靠性高、无产品版权费、易于使用等特点，并且支持大量的处理器和SoC，包括ARM、PowerPC、SH 4、MIPS、ADI DSP、TI DPS、Nios II等，因此广泛应用于消费电子、汽车电子、工业自动化、网络解决方案、军事与航空航天等领域中-ThreadX of the best hard real-time operating system, embedded in deep application with a small scale, real-time and high reliability, without copyright fees, easy-to-use features, and support a wide range of processors and SoC. including ARM, PowerPC, SH 4, MIPS, ADI DSP, TI DPS. Nios II, and so widely used in consumer electronics, automotive electronics, industrial automation, network solutions. military and aerospace fields
Platform: | Size: 1073780 | Author: 万兵 | Hits:

[Embeded-SCM Develop] hello_led

Description: niosII的一个例子！NIOSII是ALTERA出的一个软核处理器，可定制组件，可随时更改设计而不需要修改线路板！-An example of niosII! ALTERA out NIOSII is a soft-core processor, customizable components, design changes may at any time without modifying the circuit board!
Platform: | Size: 3072 | Author: ren | Hits:

[Embeded-SCM Develop] blank_project_0

Description: 在nios II DE2开发板上开发的实时时钟，已经测试通过-In nios II DE2 development board developed by real-time clock has been tested through
Platform: | Size: 3072 | Author: 沈克镇 | Hits:

[Other Embeded program] NIOSII

Description: NoisII软核在Nois IDE编译时遇到的问题的总结，有兴趣的朋友可以下去-NoisII soft-core Nois IDE at compile-time summary of the problems encountered, interested friends can go on
Platform: | Size: 13312 | Author: liufanyu | Hits:

[VHDL-FPGA-Verilog] clk

Description: 在DE2上显示时间的程序，包括年月日时分秒，可以设置开始时间，代码在NiosII IDE环境下编写-DE2 displayed in the time-consuming procedures, including the date when the minutes and seconds, you can set the start time code NiosII IDE environment to prepare
Platform: | Size: 1024 | Author: idaisy | Hits:

[Embeded-SCM Develop] time

Description: 用c语言写的niosii软核的多种外设测试程序，实用-Written by c language niosii a variety of soft-core peripherals testing procedures, practical
Platform: | Size: 1024 | Author: wanyou | Hits:

[Other Embeded program] miaobiaochengxu

Description: 利用NIOS和QUARTUS系统完成一个秒表的功能，可以实现正序和倒序显示记录的时间。-Quartus system using NIOS and complete a stopwatch function, can realize positive sequence and the reverse shows record time.
Platform: | Size: 2048 | Author: 幻婳 | Hits:

[SCM] Max7219

Description: nios环境下数码管驱动芯片max7219驱动程序，封装了八位数码管同时显示任意数值和单个数码管显示数值程序-Nios environment MAX7219 LED Driver IC driver, package of 8 At the same time, digital tube display and a single arbitrary numerical digital display numerical procedures
Platform: | Size: 2048 | Author: 廖于翔 | Hits:

[Embeded-SCM Develop] time

Description: altera 中基于NIOS软核系统的定时器应用程序 -altera-based NIOS soft-core system timer application
Platform: | Size: 406528 | Author: 黄杰 | Hits:

[Other] CLOCK

Description: 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital clock. The main function of the completion are: time function, 24-hour time display through the Seven-Segment LED dynamic display time school settings function, can be set hours, minutes, seconds the stopwatch to start, stop, and maintain display and removal.
Platform: | Size: 182272 | Author: 张保平 | Hits:

[Embeded-SCM Develop] time

Description: 一个关于Nios的万年历程序，相当有趣，扩展性极强，欢迎大家下载使用。-The calendar on the Nios procedures, very interesting, highly scalable, welcome to download.
Platform: | Size: 1024 | Author: zhangying | Hits:

[VHDL-FPGA-Verilog] NIOSIIstepbystep

Description: 分步介绍了NIOS II的基本步骤，相信你可以在很短的时间内上手的-Step-by-step NIOS II introduces the basic steps, I believe you can in a very short time-to-use
Platform: | Size: 1638400 | Author: nick | Hits:

[VHDL-FPGA-Verilog] Lab2b

Description: A C example for Nios II to use the timer and to obtain the time execution performance
Platform: | Size: 1024 | Author: gios78 | Hits:

[Embeded-SCM Develop] MicroCOS-II

Description: 在NIOS II系统使用实时操作系统ucos II的教程-NIOS II system in real-time operating system using the ucos II Guide
Platform: | Size: 259072 | Author: 钟桂东 | Hits:

[VHDL-FPGA-Verilog] DE0_D5M

Description: 这是在DE0板上实现的用D5M+VGA的图像实时显示程序，完整工程-This is achieved in DE0 board D5M+ VGA images with real-time display program, complete project
Platform: | Size: 1246208 | Author: | Hits:

[Other Embeded program] pwm

Description: NIOS上的PWM代码 硬件实现 实现了可自由定义的，自定义相位，自定义死去时间，自定义占空比-NIOS code on the hardware PWM to achieve a free-defined, custom phase, custom die time, the custom duty
Platform: | Size: 1024 | Author: Mooch | Hits:

[VHDL-FPGA-Verilog] EX2

Description: nios ii 嵌入式 实现数码管（按键切换）、LCD时间显示-nios ii embedded digital control implementation (key switch), LCD time display
Platform: | Size: 5561344 | Author: feipan | Hits:

[VHDL-FPGA-Verilog] High-Speed-FFT

Description: 优秀硕士论文，课题采用现场可编程门阵列((FPGA)，设计实现了一种超高速FFT处理器。目前，使用FPGA实现FFT多采用基2和基4结构，随着FPGA规模的不断扩大，使采用更高基数实现FFT变换成为可能。本课题就是采用Alter的Stratix II芯片完成了基16-FFT处理器的设计。在设计实现过程中，以基2-FFT搭建基16-FFT的运算核，合理安排时序，解决了碟形运算、数据传输和存储操作协调一致的问题。由于采用流水线工作方式，使整个系统的数据交换和处理速度得以很大提高。本设计实现了4096点和256点的变换，两个内部运算时钟都可以达到1 OOMHz以上，其中256点变换的数据吞吐率高达1.36GHz -a design of ultra high speed FFT processor based onFPGA is developed in this paper. At present we always use radix-2 and radix-4 tocarry out FFT. When the scale of FPGA is panding,it s possible to implement higher radix FFT. This topic uses Stratix II of Altera company to carry out a processor of radix一16 FFT.In this design, radix-16 FFT is carried out by radix-2FFT, The design uses rational time sequence arrangement to make butterflycomputing,data transformation and memory coincide.In order to avoid the bottleneck,pipeline pattern is used,this method acceletates the operating.Thescheme realizes the 4096-points and 256-points FFT, their operation clocks canboth reach above 100MHz. Among them ,the throughput of 256-points FFT is up to1.36GHz.
Platform: | Size: 3759104 | Author: 陈子牙 | Hits:

[Other Embeded program] FPGA_CPU(Nios)TFT-LCD

Description: 网络论文，非常有用。 基于FPGA 及嵌入式CPU(NiosⅡ)的TFT-LCD 接口设计 本文介绍了一种基于FPGA 及NiosII 软核处理器与TFT-LCD 接口的方法。它直接采 用CPU 对存贮器的读写，实现了对TFT-LCD 屏的实时操作。它具有直接、有效和速度 快等特点。该设计使CPU 对TFT-LCD 的控制极其简单化-Network papers, very useful. Based on FPGA and embedded CPU (Nios Ⅱ) TFT-LCD Interface Design This article describes a method based the FPGA and NiosII soft core processor interface with TFT-LCD. It directly using the CPU to the memory read and write, to achieve real-time operation of the TFT-LCD screen. It has a direct, effective and fast. This design makes the control of the CPU of the TFT-LCD is extremely simplistic
Platform: | Size: 126976 | Author: | Hits:

[VHDL-FPGA-Verilog] Nios-II-I2C

Description: 使用开源的IIC MASTER Core，将它加载到NIOSII的AVALON总线上，这样对于NIOSII控制器而言，IIC MASTER就是一个硬件实现的控制器，用户通过调用API函数就能很容易的对IIC进行操作，而且IIC的运行并不占用NIOSII软核宝贵的资源和时间。 -Open source IIC MASTER Core,it is loaded into the AVALON bus NIOSII This NIOSII controller,IIC MASTER is a hardware implementation of the controller,the user by calling the API function can easily IIC operation IIC operation does not take up valuable resources and time NIOSII soft core.
Platform: | Size: 13507584 | Author: 朱媛 | Hits:
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