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[Embeded-SCM Develop] RS232

Description: RS232 Controller For Altera SOPC Builder and NIOS on DE2 kit board
Platform: | Size: 556386 | Author: 李大同 | Hits:

[Embeded-SCM Develop] UART_nios

Description: UART nios中文使用说明,使用的是uart的控制的基本指令而不是用的基本输入输出命令-UART nios Chinese for use, using a UART control of the basic commands rather than using the basic input-output command
Platform: | Size: 173056 | Author: jin | Hits:

[Embeded-SCM Develop] RS232

Description: RS232 Controller For Altera SOPC Builder and NIOS on DE2 kit board
Platform: | Size: 556032 | Author: 李大同 | Hits:

[VHDL-FPGA-Verilog] RS232_Interrupt_Code_niosII

Description: 串口中断＿niosII.rar 解压密码：www.21control.com
Platform: | Size: 3072 | Author: 严友 | Hits:

[VHDL-FPGA-Verilog] DEMO1_KEY_LED

Description: KX_DVP3F型FPGA应用板/开发板（全套）包括：  CycloneII系列FPGA EP2C8Q208C8 40万们，含20M-270MHz锁相环2个。  RS232串行接口；VGA视频口  高速SRAM 512KB。可用于语音处理，NiosII运行等。  配置Flash EPCS2， 10万次烧写周期 。  isp单片机T89S8253：MCS51兼容单片机，12KB在系统可编程Flash ROM，10万次烧 写周期；2KB在系统可编程EEPROM，10万次烧写周期；2.7V-5.5V工作电压；0-24MHz 工作时钟；  2数码管显示器、20MHz时钟源（可通过FPGA中的锁相环倍频）；  液晶显示屏（20字X4行）；  工作电源5V、3.3V、1.2V混合电压源，良好电磁兼容性主板。  配套示例程序、资料、编程软件光盘等。  4X4键盘，4普通按键，8可锁按键，8发光管  BlasterMV编程下载器和并口通信线，可完成FPGA编程下载和isp单片机的编程。KX_DV3F开发板的源程序-err
Platform: | Size: 360448 | Author: ldg | Hits:

[Other] RS232

Description: Builder uses to integrate a larger system module. Each component consists of a structured set of files within a directory. The files in a component directory serve the following The RS232 UART Core implements a method for communication of serial data. The core provides a simple register-mapped Avalon庐 interface. Master peripherals [such as a Nios庐 II processor] communicate with the core by reading and writing control and data registers.
Platform: | Size: 561152 | Author: salah | Hits:

[VHDL-FPGA-Verilog] RS232_NIOS_Verilog

Description: 5个文件，包含了RS232的nios实现和Verilog实现方式。其中,RS232的nios核实现只需要按照文件描述可以轻松实现^_^，个人比较推荐！RS232的Verilog实现需要编程，例程方便使用。RS232正在进一步学习中，有兴趣的可以探讨。-the realizition of rs232 interface by niosii uart ip core of Altera.it seems a most conveniet way.
Platform: | Size: 685056 | Author: summerooooo | Hits:

[Embeded-SCM Develop] nios

Description: 嵌入式简单实验 基于niosII 包括lcd uart pio 的入门应用-Embedded simple experiment based on niosII including lcd uart pio entry applications
Platform: | Size: 2048 | Author: wang | Hits:

[VHDL-FPGA-Verilog] FPGA__uart(quartus11.0)

Description: 实现串口调试,也可以实现多个串口，自己建立nios核，多哥串口，带上拉电阻，以用CH340实现RS232通信-VERION verliog,qurttus 11.0 nios:nios_IDE11.0 ，
Platform: | Size: 15211520 | Author: 袁明 | Hits:

[VHDL-FPGA-Verilog] uart3

Description: 实现多个串口通信，这里是两个各，两个会了，多个也一样，版本qurtus11.0，nios：nios_11.0-you can have ues this rs232 conmunition, qurtus11.0，nios：nios_11.0
Platform: | Size: 15671296 | Author: 袁明 | Hits:

[Other Embeded program] MyC2Board_RS232_Test

Description: 这是一个Altera FPGA NIOS II RS232通讯程序。 在Quartus II工程中，用Qsys建立了一个NIOS II为核心的CPU系统，并挂接了一个RS232接口。 在software目录下，有三个工程，一个是用C++类包装的RS232类的Eclipse工程，一个是不用C++类包装的Eclipse工程，还有一个是用VC++2008编写的RS232测试工程。 VC++2008编写的工程运行在PC机上，与FPGA中的NIOS II通讯。 这个实验的主要目的是编写一个通用RS232类，这个类即可以用于NIOS II，又可以用于PC机，是一个可重用的RS232类；我们用这个类开发了不少以PC为控制平台，FPGA为硬件控制器的测试系统。 -This is an Altera FPGA NIOS II RS232 communication project. In the Quartus II project, there is a NIOS II CPU with RS232. In the Software directory, there are 3 projects. First one is an Eclipse Project with C++ RS232 Class. Second one is an Eclipse Project with C RS232.h. Other one is a VC++2008 Project with C++ RS232 Class. The purpose of this project is to write a RS232 Class use on any system needed RS232 communication. The RS232 Class not only use on NIOS II, but also use on PC. We used this RS232 Class on many Test Systems with PC and FPGA
Platform: | Size: 13864960 | Author: li hui xian | Hits:

[Com Port] UART_FOR_Altera

Description: 用于控制3个独立的全双工传输的UART/RS232接口。该接口由Altera SOPC 实现，开发环境为NIOS II。在Statrix II上工作正常。 每个接口可独立配置为短数据模式和数据流模式。-This C source file is used for controling three UART/RS232 interfaces . These interfaces are implemented by Altera s SOPC module , assembled in a Statrix II FPGA chipest . Each UART/RS232 interface was designed with capability of full duplex data trasfering , and working simultaneously
Platform: | Size: 4096 | Author: 向乐 | Hits:

[VHDL-FPGA-Verilog] RS232

Description: （6）实验6：串口通讯实验，完整的设计工程文件在RS232文件夹下二、运行环境 程序在以下环境调试通过： （1）Windows XP； （2）Altera公司的Quartus II 8.0 for windows； （3）Altera公司的Nios II 8.0 IDE for windows； （4）Mentor公司的ModelSim SE 6.0；-(6) (2) Altera Corporation Quartus II 8.0 for windows Experiment 6: serial communication experiment, a complete design engineering documents RS232 file folder Second, the operating environment program in the following environment debugging through: (1) Windows XP ( Company 3) Altera Nios II 8.0 IDE for windows (4) Mentor ModelSim SE 6.0
Platform: | Size: 14114816 | Author: boyzone | Hits:

[ELanguage] receive-im-by-rs232

Description: SEND IMAGE DATA TO NIOS II ON FPGA
Platform: | Size: 3072 | Author: lati | Hits:

[DSP program] 4CE6_RS232

Description: 关于RS232的NIOS源码程序，已调试，建议在EL-ARM-DSP-IV实验箱上调试。(NIOS source program for RS232，debugging on EL-ARM-DSP-IV experiment box.)
Platform: | Size: 17992704 | Author: 想去远行 | Hits:

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