Description: 三星原厂的S3C2440开发板测试程序包括nandflash,norfalsh,sd controller,lcd,iis,iic等测试程序,强烈推荐-Samsung S3C2440 development board of the original test procedure, including nandflash, norfalsh, sd controller, lcd, iis, iic, such as testing procedures, strongly recommend Platform: |
Size: 8466432 |
Author:王刚 |
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Description: s3c2410中文资料,在这一章中详细介绍了nandflash控制器-S3C2410 Chinese information in this chapter details the NANDFLASH Controller Platform: |
Size: 233472 |
Author:name |
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Description: S3C2440下的NANDFLASH测试源码,ADS下的源码!对需要了解2440NANDFLASH控制器和NANDFLASH基本操作原理的兄弟很有帮助!-S3C2440 under NANDFLASH test source, ADS under the source! On the controller and the necessary know 2440NANDFLASH basic operation principle NANDFLASH brothers and helpful! Platform: |
Size: 6144 |
Author:周阳超 |
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Description: 本驱动使用s3c2440的NANDflash控制器操作K9K8G08U0A NANDFlash芯片(1G字节)。并在该驱动程序基础之上定义了一个简单的自定义文件系统,支持8.3文件名格式,及文件的创建、读、写、删除等操作,支持存储块管理和坏块管理。该程序在VxWorks环境下运行无误。-The drive to use s3c2440 operation K9K8G08U0A NANDFlash of NANDflash controller chip (1G bytes). And in the driver based on the definition of a simple custom file system, supports 8.3 file name format, and documents to create, read, write, or delete operation, support block storage management, and bad block management. The program to run correctly in the VxWorks environment. Platform: |
Size: 10240 |
Author:fevery |
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Description: 该压缩包包括NAND FLASH(美光)的FPGA控制器的原理及VHDL源码,非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference. Platform: |
Size: 1587200 |
Author:张明利 |
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Description: NAND_Controller_and_ECC_VHDL,做nandFlash控制器的朋友可以参考-NAND_Controller_and_ECC_VHDL, do nandFlash controller can refer to a friend Platform: |
Size: 22528 |
Author:磊 |
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Description: 提出一种应用于 NAND Flash 控制器的并行 BCH 编/译码器,在译码阶段引入流水线操作和分组预取译码操作,提升 BCH 码的译
码效率。实验结果表明,在 NAND Flash 的 2 KB 页读取操作中,该编/译码器纠正 8 bit 的随机错误只需要 565 个周期的译码时间,是采用按页预取译码方式所需时间的 1/4。
-Anew architecture of parallel BCH encoder and decoder applied in NAND Flash Controller is proposed. In order to obviously increase the throughput of decoder, pipeline operation and prefetch decoding in group operation are applied in the design. It takes 565 cycles to correct 8 bit random error after NAND Flash’s 2 KB page read operation, which is a quarter of the time cost by prefetch & decode in page.
Platform: |
Size: 1088512 |
Author:misslu |
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Description: NandFlash Controller: It s contain a NandFlash controller in verilog language. It is a interface between microprocess and NandFlash memory. Platform: |
Size: 2048 |
Author:william |
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