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[VHDL-FPGA-Verilog] sinmdlmatlab

Description: 正弦波在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-sine wave in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
Platform: | Size: 6144 | Author: zqh | Hits:

[VHDL-FPGA-Verilog] modelsim_tu

Description: modelsim快速入门教程，附带文中范例源代码。-ModelSim Quick Start Guide, incidental text in an example of source code.
Platform: | Size: 1094656 | Author: 陈叙圆 | Hits:

[VHDL-FPGA-Verilog] PWM

Description: 脉冲宽度调制，VHDL代码编写，包括QUARTUSII和MODELSIM工程以及testbench-Pulse width modulation, VHDL coding, including QUARTUSII and ModelSim engineering and Testbench
Platform: | Size: 348160 | Author: horse | Hits:

[VHDL-FPGA-Verilog] ModelSim

Description: ModelSim下用SystemC做设计验证方法与示例-ModelSim using SystemC to do design verification methods and sample
Platform: | Size: 1139712 | Author: 邹积银 | Hits:

[VHDL-FPGA-Verilog] sha-1

Description: 本算法基于leon2协处理器接口标准，内含testbench，在modelsim中仿真通过，在ise9.2中综合及后仿真通过。-The algorithm is based on the leon2 co-processor interface standard, including testbench, ModelSim simulation in the adoption, in ise9.2 integrated and adopted after the simulation.
Platform: | Size: 15360 | Author: ninghuiming | Hits:

[GPS develop] GPS_CA_Generator_vhdl

Description: GPS对应的CA短码发生电路的VHDL描述程序，附带modelsim仿真用源文件-GPS code corresponding to happen CA short circuit VHDL description of the procedure, with ModelSim simulation using the source file
Platform: | Size: 2048 | Author: 刘鹏宇 | Hits:

[VHDL-FPGA-Verilog] generic_testbench

Description: VHDL中关于generic的用法，及其testbench，可以使用Modelsim仿真查看其功能-the usage of generic,a testbench file is given, we can use it to simulate the generic s function
Platform: | Size: 2048 | Author: xietianjiao | Hits:

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