Search - mips - CodeBus

[Linux-Unix] mips_linux

Description: mips的移植代码,使用于bootload,可以用,需要改动一定东西-transplant mips code, used in bootload, may need to change certain things
Platform: | Size: 3072 | Author: rongpeng | Hits:

[ARM-PowerPC-ColdFire-MIPS] admboot-orignate

Description: mips架构处理器ADM5120的全部详细boot-loader源代码，可参考性，可移植性极大！！，大家好好利用啊.-mips processor architecture ADM5120 full details boot-loader source code, can refer to, and portability great! ! We make good use of ah.
Platform: | Size: 1496064 | Author: yiqi | Hits:

[VHDL-FPGA-Verilog] MIPS

Description:
Platform: | Size: 726016 | Author: stephen | Hits:

[uCOS] uCOS-II.arca.tar

Description: ucos 在arca方舟芯片（mips）上的移植。-uCOS in arca ark chips (mips) on transplantation.
Platform: | Size: 48128 | Author: ccc | Hits:

[Home Personal application] initrd

Description: What is it? A generic stand-alone MIPS program that can do printf on a standard UART. requirements: . CPU has CP0 structure (r4k compatible) Configure: -What is it? A generic stand-alone MIPS program that can do printf on a standard UART.requirements:. CPU has CP0 structure (r4k compatible) Configure:
Platform: | Size: 2909184 | Author: dtqaz | Hits:

[Windows CE] Eboot_AMD

Description: 基于AU1200的启动代码EBOOT,这是WINCE下的代码，对于用MIPS架构的有帮助-Au1200-based startup code EBOOT, this is under WINCE code, for use MIPS architecture helpful
Platform: | Size: 474112 | Author: 邹海源 | Hits:

[ARM-PowerPC-ColdFire-MIPS] mrua_SMP8634_2.8.2.0_dev.mips

Description: Sigma SMP8634 Mrua v. 2.8.2.0
Platform: | Size: 3383296 | Author: Jorma Pelli | Hits:

[VHDL-FPGA-Verilog] mipsCPU

Description: MIPS CPU tested in Icarus Verilog
Platform: | Size: 20480 | Author: imromeo | Hits:

[Other Embeded program] proj2

Description: run mips program using C-run mips program using C++
Platform: | Size: 9216 | Author: leo | Hits:

[Other] abi_SystemV_mips_3r

Description: mips[risc]平台的abi调用规范，第三版-abi spec of mips[risc] platform, 3rd
Platform: | Size: 317440 | Author: 张晓飞 | Hits:

[ARM-PowerPC-ColdFire-MIPS] msim-1.3.7

Description: 一个MIPS模拟器的源码，这个模拟器可以直接解释执行MIPS汇编文件，很适合调试-A MIPS simulator source code, the simulator can directly explain the implementation of MIPS compilation of documents, it is suitable debugging
Platform: | Size: 182272 | Author: 梁一信 | Hits:

[JSP/Java] JavaMIPS

Description: MIPS 仿真器，能够实现汇编，反汇编和模拟运行。自己开发的，java课的大程，可能问题比较多，仅做参考，而且程序架构也设计地不是很好。但作为新手大程学习和简单的MIPS模拟还是没有问题的。本 MIPS 模拟器支持的指令如下： add,addi,sub,subi,and,andi,or,ori,nor,beq,bne,j,jr,jal,lw,lh,lb,sw,sh,sb, 其中所有的跳转指令第三个操作数只能为一个行标签[不支持相对地址以及绝对地址]，标签可以写在一行开头，以冒号结尾。 -MIPS emulator, be able to achieve a compilation of anti-compilation and simulation is running. Their own development, java classes big way, may be more questions, just make a reference, but also architecture design process is not very good. But as a new large study and easy way of MIPS simulation of the problem or not. The MIPS simulator supports the following commands: add, addi, sub, subi, and, andi, or, ori, nor, beq, bne, j, jr, jal, lw, lh, lb, sw, sh, sb, one of all of the Jump instruction operand can only be the third for a tag line [do not support the relative address and absolute address] can be written on the tag line at the beginning to the end of the colon.
Platform: | Size: 1490944 | Author: ly | Hits:

[ARM-PowerPC-ColdFire-MIPS] mipscpudesign

Description: cpu设计实例mips。MIPSI指令集32位CPU（1）MiniCore设计实例全32位操作，32个32位通用寄存器，所有指令和地址全为32位（2）静态流水线（3～5级）（3）Forwarding技术（4）片内L1 Cache，指令、数据各4KByte，硬件初始化（5）没有TLB，但系统控制协处理器（CP0）具有除页面映射外的全部功能 -cpu design example mips. MIPSI instruction set 32-bit CPU (1) MiniCore design example of the entire 32-bit operation, 32 32-bit general-purpose registers, all the commands and addresses are all 32-bit (2) static line (3 ~ 5) (3) Forwarding technology (4 )-chip L1 Cache, command, data of all 4KByte, hardware initialization (5) there is no TLB, but the system control coprocessor (CP0) with the exception of pages outside the full functionality of mapping
Platform: | Size: 27648 | Author: 游笑 | Hits:

[Other] jtag_tutorial

Description: The main MIPS processor of SMP8630 comes with a JTAG interface, allowing: access to caches and data bus (DRAM) with a bandwidth of about 200kbit/s examining the processor state whatever the execution mode (monice) connecting to monice using mdi-server and using a gdb client on the processor to step and break accurately whatever the execution mode running semi-hosted applications ﬂ ash write tool memory testing (MT command) real-time traces: has not been built in CPU (Config3_TL=0) and only supported by MajicPLUS probes (maybe built into emulator?)
Platform: | Size: 118784 | Author: 江海之舟 | Hits:

[Other] mips2000src

Description: A small MIPS R2000 implementation in VHDL
Platform: | Size: 26624 | Author: methy | Hits:

[Other] ask10

Description: This a simple MIPS processor datapath written in VERILOG hardware language. You can see the signals when emulating in signalscan. Compile it with verilog in linux.-This is a simple MIPS processor datapath written in VERILOG hardware language. You can see the signals when emulating in signalscan. Compile it with verilog in linux.
Platform: | Size: 2048 | Author: thesky | Hits:

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