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[VHDL-FPGA-Verilogmanchester-code

Description: 曼彻斯特编码技术用电压的变化表示0和1。规定在每个码元中间发生跳变。高→ 低的跳变表示0,低→ 高的跳变表示为1。每个码元中间都要发生跳变,接收端可将此变化提取出来作为同步信号,使接收端的时钟与发送设备的时钟保持一致-Manchester coding techniques that use voltage changes in 0 and 1. Provisions in the middle of each symbol hopping happen. High → low hopping express 0, low → high jump for the express one. Symbol between each transition must happen, this change in the receiver can be extracted as a synchronization signal to the receiving end of the clock and send the equipment to maintain the same clock
Platform: | Size: 91136 | Author: 魏伟 | Hits:

[source in ebookMyCC1000

Description: CC1000驱动源码,用于驱动底层,配置为曼码通信模式,三线配置接口,外部中断-// Device: CC1020 // System parameters: // X-tal frequency: 14.745600 MHz Internal // X-tal accuracy:+/- 5 ppm // RF frequency A: 433.916 MHz Active Tx // RF frequency B: 433.916 MHz Inactive Rx // Frequency separation: 32 kHz // Data rate: 19.2 kBaud // Data Format: Manchester Accurate // RF output power:+10 dBm // Channel width: 200 kHz // Modulation: FSK Dithering enabled // Lock: Continuous // Carrier sense offset: 0 dBm DCLK squelch disabled // Operator Mode:Rx Guangzou ZLG-MCU Development Co.,LTD. ** graduate school ** http://www.zlgmcu.com ** **--------------File Info------------------------------------------------------------------------------- ** File Name: config.h ** Last modified Date: 2004-09-17 ** Last Version: 1.0 ** Descriptions: User Configurable File ** **------------------------------------------------------------------------------------------------------ ** Creat
Platform: | Size: 2048 | Author: 贺飞 | Hits:

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