Search - low pass filter VHDL

[VHDL-FPGA-Verilog] FIR低通滤波器部分模块

Description: 一个FIR低通滤波器,最小阻带衰减-30db,带内波动小于1db．用MAXPLUS2设计与仿真。-This is a FIR LPF, with-30dB in stop-band and sigma is less than 1dB. It is designed and simulated on MAXPLUS2.
Platform: | Size: 5120 | Author: 吴健宇 | Hits:

[VHDL-FPGA-Verilog] Pall_FIR

Description: FIR低通滤波器得设计，采用并行算法设计-FIR low-pass filter was designed in parallel algorithm design
Platform: | Size: 2004992 | Author: luyingc | Hits:

[VHDL-FPGA-Verilog] LowpassfilterVHDLcord

Description: 低通滤波器的VHDL代码，需要的可以下来看看，本人QQ147440013，有志同道合的人可以加我哦-Low-pass filter of the VHDL code, need to take a look at the can down, I QQ147440013, have like-minded people can add me, oh
Platform: | Size: 4096 | Author: 黄建 | Hits:

[matlab] Matlab_butterfilter

Description: 基于matlab的低通滤波器代码，可以自动生成VHDL源代码-Based on the low-pass filter matlab code, you can automatically generate VHDL source code
Platform: | Size: 1024 | Author: 黄建 | Hits:

[VHDL-FPGA-Verilog] rmfilter

Description: 低通滤波器在QUARTUS7.0开发环境下的文本与框图结合的实现方法的源代码-Low-pass filter QUARTUS7.0 development environment in the text and diagram combination of methods to achieve source code
Platform: | Size: 10240 | Author: Rebecca | Hits:

[Other] 17jie_fir

Description: 采用VHDL语言实现17阶的数字低通滤波器的设计-VHDL language used to achieve 17 the number of bands of low-pass filter design
Platform: | Size: 290816 | Author: 望天 | Hits:

[DSP program] hpiir

Description: FPGA文件程序，irr型低通滤波器，vhd程序 -FPGA program file, irr-type low-pass filter, vhd procedures
Platform: | Size: 1236992 | Author: 袖手人 | Hits:

[Energy industry] Verilog

Description: 全加器的Verilog 实现代码寄存器的Verilog 实现代码-Low-pass filter integral part of full-adder and register the Verilog implementation code
Platform: | Size: 3072 | Author: 田静 | Hits:

[Windows Develop] Desktop

Description: DDS数字频率合成DDS由相位累加器、正弦查找表、D／A转换器和低通滤波器组成 -DDS DDS DDS from the phase accumulator, sine look-up tables, D/A converter and low-pass filter composed of
Platform: | Size: 1024 | Author: chenxiaofeng | Hits:

[Other Embeded program] vhdl

Description: there is Design a butterworth low pass IIR filter. (a) Using butterworth to design an IIR low pass filter with Fs=8192hz and Fpass =1000 and Fstop =1200. You use the minimum order of filter. And match exactly at pass band. and other programs
Platform: | Size: 2048 | Author: fathima | Hits:

[Embeded Linux] 83390078DDS

Description: DDS的工作原理是以数控振荡器的方式产生频率、相位可控制的正弦波。电路一般包括基准时钟、频率累加器、相位累加器、幅度/相位转换电路、D/A转换器和低通滤波器（LPF）。频率累加器对输入信号进行累加运算，产生频率控制数据X（frequency data或相位步进量）。相位累加器由N位全加器和N位累加寄存器级联而成，对代表频率的2进制码进行累加运算，是典型的反馈电路，产生累加结果Y。幅度/相位转换电路实质上是一个波形寄存器，以供查表使用。读出的数据送入D/A转换器和低通滤波器。-DDS works the way we are digitally controlled oscillator frequency, phase controlled sine wave. Circuits generally include reference clock, frequency accumulator, phase accumulator, amplitude/phase converter circuit, D/A converter and low-pass filter (LPF). The frequency accumulator to accumulate the input signal operation to produce the frequency control data X (frequency data or phase stepping volume). From the N-bit phase accumulator and the N-bit full adder cascade accumulation register is made on behalf of the frequency of the two binary codes accumulation operation, is a typical feedback circuit, resulting in cumulative results of Y. Amplitude/phase converter circuit is essentially a waveform register for look-up table to use. Read out the data into the D/A converter and low pass filter.
Platform: | Size: 44032 | Author: 394177191 | Hits:

[VHDL-FPGA-Verilog] lowpassfir

Description: Low pass fir filter for ecg signal in VHDL
Platform: | Size: 1024 | Author: rohan | Hits:

[Mathimatics-Numerical algorithms] fir_filter

Description: 该数字滤波器通过结合matlab和vhdl来实现低通fir数字滤波器功能-The digital filter through a combination of matlab and vhdl to achieve low-pass digital filter function fir
Platform: | Size: 26624 | Author: caoge | Hits:

[Other] IIr

Description: 十阶巴特沃斯低通滤波器设计（应用时域交叉原理编写的VHDL代码）-10-order Butterworth low pass filter design (application of principles of time-domain cross-written VHDL code)
Platform: | Size: 1024 | Author: 郭兴祖 | Hits:

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[VHDL-FPGA-Verilog] FIR低通滤波器部分模块

[VHDL-FPGA-Verilog] Pall_FIR

[VHDL-FPGA-Verilog] LowpassfilterVHDLcord

[matlab] Matlab_butterfilter

[VHDL-FPGA-Verilog] rmfilter

[Other] 17jie_fir

[DSP program] hpiir

[Energy industry] Verilog

[Windows Develop] Desktop

[Other Embeded program] vhdl

[Embeded Linux] 83390078DDS

[VHDL-FPGA-Verilog] lowpassfir

[Mathimatics-Numerical algorithms] fir_filter

[Other] IIr

[VHDL-FPGA-Verilog] fir_filter

[VHDL-FPGA-Verilog] lowpassfilterdesign

[Embeded-SCM Develop] LPfilter

[VHDL-FPGA-Verilog] FIR_128

[VHDL-FPGA-Verilog] filter

[VHDL-FPGA-Verilog] fir-filter-design-with-VHDL.doc

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