Search - ldpc decoder vhdl

[matlab] LDPCBSN

Description: LDPC码既低密度奇偶校验码（Low Density Parity Check Code，LDPC），它由Robert G.Gallager博士于1963年提出的一类具有稀疏校验矩阵的线性分组码，不仅有逼近Shannon限的良好性能，而且译码复杂度较低, 结构灵活，是近年信道编码领域的研究热点，目前已广泛应用于深空通信、光纤通信、卫星数字视频和音频广播等领域。LDPC码已成为第四代通信系统(4G) -LDPC codes BER simulation under AWGN channel. MacKay-Neal based LDPC matrix. Message encoding uses sparse LU decomposition. There are 4 choices of decoder: hard-decision/bit-flip decoder, probability-domain SPA decoder, log-domain SPA decoder, and simplified log-domain SPA decoder.
Platform: | Size: 8192 | Author: 天天 | Hits:

[VHDL-FPGA-Verilog] ldpc_decoder_802_3an_latest.tar

Description: 适用于10GBase-T的以太网(802.3an协议)LDPC解码器, 用VHDL语言编写，可以应用在LATTICEXP2系列芯片上，基于Gallager算法。-LDPC decoder for 10GBase-T Ethernet (802.3an), based on Gallager s A algorithm
Platform: | Size: 884736 | Author: liang | Hits:

[Other] rlut

Description: ldpc译码器的部分校验和的原理图转化为VHDL语言。-ldpc decoder part of the checksum of the schematic diagram into VHDL language.
Platform: | Size: 3072 | Author: | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[matlab] LDPCBSN

[VHDL-FPGA-Verilog] ldpc_decoder_802_3an_latest.tar

[Other] rlut

[VHDL-FPGA-Verilog] LDPC

[VHDL-FPGA-Verilog] ldpc-decoder

[VHDL-FPGA-Verilog] ps_decoder3_12_80_mod

CodeBus www.codebus.net