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[Other] LCD

Description: ALTERA上DE2平台，使用LCD模块，在LCD上显示字母字符。与已有程序相比，程序更加优化，代码更少。
Platform: | Size: 506154 | Author: 徐朝凯 | Hits:

[VHDL-FPGA-Verilog] de2_clock

Description: 适合DE2板，能够在板子上的液晶显示器上实现时钟功能。-for Dictyophora board, in the way of achieving LCD clock function.
Platform: | Size: 80896 | Author: 曾 | Hits:

Description: 基于ＡＬＴＥＲＡ公司的ＤＥ２的ＬＣＤ显示程序，一起学习．非常好的资料，也非常难得．是我参加培训时所得-the DE2 LCD display program, learning together. Very good information, and they are extremely rare. I receive training
Platform: | Size: 5120 | Author: 唐老鸭 | Hits:

[Other Embeded program] DE2_LCM_Test

Description: 基于Quartus的TFT－LCD测试程序，实现黑白条纹，彩色格等功能-Quartus on the TFT-LCD test procedure, the realization of black and white stripes, features such as color cell
Platform: | Size: 4021248 | Author: 李晋 | Hits:

[VHDL-FPGA-Verilog] LCD_TEST

Description: LCD_test.用来测试LCD的显示。已经用在DE2开发办上了，可以用-LCD_test. To test the LCD display. Has been used in the DE2 Development Office, and can be used
Platform: | Size: 4096 | Author: teok | Hits:

[Embeded-SCM Develop] nios_lcd

Description: 基于DE2实验板，Eclipse开发环境，调试成功，将C文件Import至新建的Eclipse工程即可。-Based on the DE2 board, Eclipse development environment, debugging success of C files Import to new Eclipse project can be.
Platform: | Size: 207872 | Author: tallergao | Hits:

[VHDL-FPGA-Verilog] vhdl_lcd_success

Description: 基于DE2实验板，Quartus6.0开发环境，驱动两行液晶，其中分频值可以设置的更小一些，调试成功，编译下载即可。-Based on the DE2 board, Quartus6.0 development environment, drive a two-line LCD, which can set the frequency value of the even smaller number, debug successfully, the compiler can be downloaded.
Platform: | Size: 281600 | Author: tallergao | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_Test

Description: DE2控制LCD显示，VHDL编写对LCD的控制，TRDB_LCM显示器 teraslc公司生产-DE2 control LCD display, VHDL prepared for LCD control, TRDB_LCM displays produced teraslc
Platform: | Size: 4096 | Author: 白雪 | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_TV

Description: DE2控制LCD显示电视图像，TRDB-LCM，采用NTSC标准，很有用啊-DE2 control LCD display television images, TRDB-LCM, using NTSC standard, useful ah
Platform: | Size: 4096 | Author: 白雪 | Hits:

[Database system] DE2_LCD

Description: 本源码是用verilog编写控制LCD——使用Quartusii，开发平台使用的是DE2开发板，可实现1602上任意字符显示-The Verilog source code is used to prepare control LCD- the use of Quartusii, development platform using a DE2 development board can realize arbitrary characters show 1602
Platform: | Size: 522240 | Author: lf | Hits:

[Other] LCD

Description: ALTERA上DE2平台，使用LCD模块，在LCD上显示字母字符。与已有程序相比，程序更加优化，代码更少。-ALTERA on DE2 platform, the use of LCD modules, LCD display in alphabetic characters. Compared with the existing procedures, procedures more optimized, less code.
Platform: | Size: 505856 | Author: 徐朝凯 | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_CharLCD

Description: nios ii在DE2上实现LCD动态显示，运行成功-nios ii in DE2 to achieve LCD dynamic display, running a successful
Platform: | Size: 18535424 | Author: amy | Hits:

[VHDL-FPGA-Verilog] DE2

Description: 使用 DE2板制作的多功能数字钟，含有选择功能，秒表，电子表，闹钟，用7-segment LED液晶显示，可以通过LCD看当时状态附有仿真波形--Clk_Div,- Mode_Select,-Watch,-stop_watch,-Lcd_Module,-Total_Out source code，Simulation waveform
Platform: | Size: 3694592 | Author: 赵香君 | Hits:

[VHDL-FPGA-Verilog] LCD

Description: 這是一個DE2的LCD模組顯示程序包含計時和99成法表的功能，保證可動-This is a DE2s LCD display program that contains timing and function of the table 99 into law to ensure that moving
Platform: | Size: 1818624 | Author: 蕭峰 | Hits:

[VHDL-FPGA-Verilog] main_control

Description: listing program to display a character in DE2 Altera s LCD with keyboard as an input
Platform: | Size: 1084416 | Author: kevin | Hits:

[VHDL-FPGA-Verilog] DE2_LCD

Description: DE2开发板LCD控制代码，LCD模块使用-We are DE2 LCD something
Platform: | Size: 5120 | Author: GYX | Hits:

[Other] LCD_Display

Description: LCD Display on DE2 board
Platform: | Size: 2048 | Author: Huy | Hits:

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[Other] LCD

[VHDL-FPGA-Verilog] de2_clock

[Other Embeded program] lcd12

[Other Embeded program] DE2_LCM_Test

[VHDL-FPGA-Verilog] LCD_TEST

[Embeded-SCM Develop] nios_lcd

[VHDL-FPGA-Verilog] vhdl_lcd_success

[VHDL-FPGA-Verilog] DE2_LCM_Test

[VHDL-FPGA-Verilog] DE2_LCM_TV

[Database system] DE2_LCD

[Other] LCD

[VHDL-FPGA-Verilog] DE2_NIOS_CharLCD

[VHDL-FPGA-Verilog] DE2

[VHDL-FPGA-Verilog] LCD

[VHDL-FPGA-Verilog] main_control

[VHDL-FPGA-Verilog] DE2_LCD

[Other] LCD_Display

[VHDL-FPGA-Verilog] LCD

[VHDL-FPGA-Verilog] lcd

[LabView] PC-to-LCD-DE2

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