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[Special EffectsXAPP928

Description: 图像处理VHDL代码,你们最近可以看看LCD显示-Image processing VHDL code, you can look at the recent LCD display
Platform: | Size: 1752064 | Author: 张丽滨 | Hits:

[VHDL-FPGA-Verilogdjdcf

Description: 在3D图像处理等对运算要求高的领域,高效除法器已成为处理器内必不可少的部件。在分析除法器设计的泰勒级数展开算法基础上,提出了一种新的除法器设计算法。在满足同样精度的情况下,所实现的三级流水线的除法器,与基于泰勒级数展开算法的除法器相比,面积更小,速度更快。-In 3D image processing and so on, demanding area of computing, efficient divider has become essential components inside the processor. In analyzing the divider design Taylor series expansion algorithm based on a new design algorithm divider. Meet the same accuracy in the cases, the three realize the divider line, and based on the Taylor series expansion algorithm divider compared to a smaller area, faster.
Platform: | Size: 157696 | Author: usbusb01 | Hits:

[Special Effectsthe.implement.of.image.pretreatment.algorithm.in.t

Description: 现场可编程逻辑门阵列在实时数字图像处理中的应用-Field-programmable gate array logic in real-time digital image processing
Platform: | Size: 159744 | Author: 刘文娟 | Hits:

[VHDL-FPGA-VerilogFPGA

Description: HDTV视频内容创作的繁荣以及在带宽受限的广播信道环境中传送这些视频内容的方法,不断催生新的视频压缩标准和相关视频图像处理设备。-HDTV video content creation and prosperity as well as bandwidth-constrained environment of the broadcasting channel to send video content of these methods, birth of a new video compression standards and associated video image processing equipment.
Platform: | Size: 59392 | Author: chenqunqin | Hits:

[VHDL-FPGA-VerilogImageProcessing

Description: 这个是国外大学的项目代码 ,这个是数字图像处理的模块-This is a project abroad, the University of code, this is a digital image processing module
Platform: | Size: 15399936 | Author: 陈晓 | Hits:

[Special Effectsmultilevel_filter

Description: 完整的多级滤波图像处理算法,利用FPGA实现,利用硬件结构实现算法能够满足苛刻的实时性要求。-Complete multi-level filtering image processing algorithms using FPGA realization algorithm using hardware structure able to meet the demanding requirements of real-time.
Platform: | Size: 588800 | Author: 朱磊 | Hits:

[VHDL-FPGA-VerilogFPGAbi_ioreseach

Description: :针对现场可编程门阵列(FPGA)芯片的特点,研究FPGA中双向端口I/O的设计,同时给 出仿真初始化双向端口I/O的方法。采用这种双向端口的设计方法,选用Xilinx的Spartan2E芯片 设计一个多通道图像信号处理系统。-: For field programmable gate array (FPGA) chip features of FPGA in the bi-directional port I/O design, the simulation is initialized at the same time two-way port I/O method. Using this design method of two-way ports, optional Spartan2E the Xilinx chip to design a multi-channel image signal processing system.
Platform: | Size: 115712 | Author: zhanyi | Hits:

[Special EffectsRead

Description: 这是一个有关实时模拟和数字图像处理的fpga程序-This is a real-time analog and digital image processing procedures for the FPGA
Platform: | Size: 1024 | Author: cjgqf | Hits:

[Other23

Description: 图像技术的应用 : 包括:基于FPGA的图像处理系统; 基于图像特征的景象匹配辅助导航系统中的关键技术研究; 图像导航技术的发展和应用 -Application of imaging technology: including: FPGA-based image processing system images based on image feature matching assisted navigation system in the research of key technologies image navigation technology development and application of
Platform: | Size: 4107264 | Author: 李灵 | Hits:

[Special Effectsvideo_process_base_on_DSPandFPGA

Description: 基于高速数字信号处理器(DSP) 和大规模现场可编程门阵列( FPGA) ,成功地研制了小型 化、低功耗的实时视频采集、处理和显示平台. 其中的DSP 负责图像处理,其外围的全部数字逻辑功能都集成在一片FPGA 内,包括高速视频流FIFO、同步时序产生与控制、接口逻辑转换和对视频编/ 解码器进行设置的I2 C 控制核等. 通过增大FIFO 位宽、提高传输带宽,降低了占用EMIF 总线的时间 利用数字延迟锁相环逻辑,提高了显示接口时序控制精度. 系统软件由驱动层、管理层和应用层组成,使得硬件管理与算法程序设计彼此分离,并能协同工作. 系统中的图像缓冲区采用了 三帧的配置方案,使得该平台最终具有对PAL/ N TSC 两种制式的全分辨率彩色复合视频信号进行实时采集、显示和处理的能力.-Based on high-speed digital signal processor (DSP) and large-scale field programmable gate array (FPGA), successfully developed a smaller, low-power real-time video capture, processing and display platform. One of the DSP is responsible for image processing, all its external digital logic functions are integrated in a FPGA, including high-speed video streaming FIFO, synchronous sequential generate and control, conversion and interface logic for video encoder/decoder to set up the control of nuclear and other I2 C. through increased FIFO bit width, increase the transmission bandwidth, reducing the time occupied by EMIF bus delay phase-locked loop using digital logic,
Platform: | Size: 546816 | Author: John | Hits:

[VHDL-FPGA-Verilogfilter

Description: 图像处理技术中3*3模板的滤波电路的VHDL实现.-Image processing technology in the 3* 3 template VHDL implementation of the filter circuit.
Platform: | Size: 292864 | Author: 翁文天 | Hits:

[VHDL-FPGA-Verilogedge

Description: 图像处理中边缘检测的VHDL源代码,所用的算法是garbor变换-Image processing edge detection of VHDL source code, the algorithms used are garbor transform
Platform: | Size: 384000 | Author: 翁文天 | Hits:

[Software Engineeringmedianfilter

Description: 基于vhdl图像处理中值滤波器,关于图像处理的好文章。-VHDL-based image processing median filter, a good deal about graphics article Ha ha
Platform: | Size: 249856 | Author: 张海风 | Hits:

[Other Embeded programCCD_senior_design_final_report

Description: 一个基于FPGA和CCD的视觉处理硬件平台项目开发文档-The design is a first step towards a hardware implementation of the super-resolution algorithms and other multimedia projects.The design presented in this paper may be used as a platform for many multimedia and image processing projects.
Platform: | Size: 483328 | Author: neversee | Hits:

[Graph programImageProcessing

Description: 应用不同的用户可选择回旋滤波器的图像处理部件。一套PC应用程序将图像档案下载到一个FPGA可访问的存储器阵列。处理过的图像显示在连接的VGA显示屏上。 -Users can choose to apply a different room of the image processing filter components. A set of PC applications will be image files downloaded to a FPGA can access the memory array. Processed image displayed on the VGA display connection.
Platform: | Size: 15406080 | Author: chenlunhai | Hits:

[VHDL-FPGA-VerilogFPGA_ImageProcessing

Description: Implementation of Image Processing Algorithms in FPGA Hardware.
Platform: | Size: 105472 | Author: Sooraj | Hits:

[assembly languageLDR

Description: 图像 processing,用来 track the position of the object plus light dependence resistor-image processing, used to track the position of the object plus light dependence resistor
Platform: | Size: 2048 | Author: zhang wei | Hits:

[Graph programDE2_70_D5M_LTM_black-line

Description: 基于DE2-70的摄像头图像处理程序,主要在边缘检测上增加了视线内黑线判断的功能-Based on the DE2-70 camera image-processing program, mainly in the edge detection increased the black line within the line of sight to determine the function
Platform: | Size: 6322176 | Author: liliang | Hits:

[VHDL-FPGA-Verilogzx

Description: CCD图像的颜色插值算法研究及其FPGA实现 ,这是一篇论文,里面详细介绍了如何实现图像处理的方法-CCD color image interpolation algorithm and its FPGA implementation, which is a paper, which details how to implement image processing method
Platform: | Size: 4647936 | Author: | Hits:

[VHDL-FPGA-VerilogVhdl-Image-Processing

Description: Vhdl-Image-Processing
Platform: | Size: 4657152 | Author: commando | Hits:
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