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[Other resource] talkFpgaDesign

Description: 什么是目前FPGA应用工程师面对的最主要设计问题？如何解决？当开始一个新的FPGA设计时，你们会推荐客户采用什么样的流程？对于I/O信号分布的处理，有什么建议可以提供给客户？如果你的客户准备移植到另外一个FPGA、结构化ASIC或ASIC，你会建议你的客户如何做？-What is the current FPGA application engineers face the most important design issues? How can it be resolved? When beginning a new FPGA design, you will recommend customers use what kind of process? For I / O signal distribution, what can be provided to customers? If your customers are going to transplant to another FPGA, structured ASIC, or ASIC, You will recommend to your clients do?
Platform: | Size: 361183 | Author: 张风 | Hits:

[Other] talkFpgaDesign

Description: 什么是目前FPGA应用工程师面对的最主要设计问题？如何解决？当开始一个新的FPGA设计时，你们会推荐客户采用什么样的流程？对于I/O信号分布的处理，有什么建议可以提供给客户？如果你的客户准备移植到另外一个FPGA、结构化ASIC或ASIC，你会建议你的客户如何做？-What is the current FPGA application engineers face the most important design issues? How can it be resolved? When beginning a new FPGA design, you will recommend customers use what kind of process? For I/O signal distribution, what can be provided to customers? If your customers are going to transplant to another FPGA, structured ASIC, or ASIC, You will recommend to your clients do?
Platform: | Size: 360448 | Author: 张风 | Hits:

[AI-NN-PR] blinkdetect-src

Description: 眨眼检测，先用haar特征框定人脸，然后用camshift跟踪人脸，根据几何特征得到人眼的大概位置，然后根据直方图的变化检测眨眼-Blink detection, the first feature with the haar framed face, and then use camshift tracking human face, according to the geometric features are the approximate location of the human eye, and then change detection histogram blink of an eye
Platform: | Size: 5120 | Author: 阿强 | Hits:

[VHDL-FPGA-Verilog] TIMEFACEDETECTIONANDLIPFEATUREEXTRACTIONUSINGFPGA

Description: Abstract—This paper proposes a new technique for face detection and lip feature extraction. A real-time field-programmable gate array (FPGA) implementation of the two proposed techniques is also presented. Face detection is based on a naive Bayes classifier that classifies an edge-extracted representation of an image. Using edge representation significantly reduces the model’s size to only 5184 B, which is 2417 times smaller than a comparable statistical modeling technique, while achieving an 86.6 correct detection rate under various lighting conditions. Lip feature extraction uses the contrast around the lip contour to extract the height and width of the mouth, metrics that are useful for speech filtering. The proposed FPGA system occupies only 15 050 logic cells, or about six times less than a current comparable FPGA face detection system.-Abstract—This paper proposes a new technique for face detection and lip feature extraction. A real-time field-programmable gate array (FPGA) implementation of the two proposed techniques is also presented. Face detection is based on a naive Bayes classifier that classifies an edge-extracted representation of an image. Using edge representation significantly reduces the model’s size to only 5184 B, which is 2417 times smaller than a comparable statistical modeling technique, while achieving an 86.6 correct detection rate under various lighting conditions. Lip feature extraction uses the contrast around the lip contour to extract the height and width of the mouth, metrics that are useful for speech filtering. The proposed FPGA system occupies only 15 050 logic cells, or about six times less than a current comparable FPGA face detection system.
Platform: | Size: 28409856 | Author: ramanaidu | Hits:

[VHDL-FPGA-Verilog] ztj

Description: VHDL 状态机 FPGA编程设计源代码程序你面通通都有-VHDL State Machine Programming FPGA source code program you have them all face
Platform: | Size: 219136 | Author: aya00 | Hits:

[matlab] pcayes

Description: face detection based on fpga
Platform: | Size: 244736 | Author: roop | Hits:

[VHDL-FPGA-Verilog] face-detection

Description: 基于fpga的人脸识别，包括硬件平台的搭建的详细过程，人脸识别算法的详细程序代码。-Fpga-based face recognition, including the hardware platform to build a detailed process of face recognition algorithm detailed code.
Platform: | Size: 432128 | Author: tiger | Hits:

[Graph Recognize] Face-Recgnition-on-FPGA

Description: 详细介绍了如何在FPGA上建立人脸识别系统，从硬件软件两方面做了说明，非常值得仔细阅读学习-Details how to build face recognition system on an FPGA, made from both hardware and software are described, well worth learning to read
Platform: | Size: 964608 | Author: 张文浩 | Hits:

[SCM] singel-chip

Description: 基于51单片机的液晶万年历 二十一世纪最具代表性的计时产品就是电子万年历。从原有传统指针计时的方式发展成为人们更为熟悉的数字显示方式，直观明了，并增加了全自动日期，星期，闹钟及附属的显示功能，它更符合消费者的生活需求。相信随着相关技术的发展和推进，一定会得到更大的应用。-Abstract This article presents the AEGIS secure processor architecture, which enables new applications by ensuring private and authentic program execution even in the face of physical attack. Our architecture uses two new primitives to achieve physical security. First, we describe Physical Random Functions which reliably protect and share secrets in a manner that is cheaper and more secure than existing solutions based on non-volatile memory. Second, off-chip memory protection mechanisms ensure the integrity and the privacy of off-chip memory. Our processor, with its new protection mechanisms, has been implemented on an FPGA, and is fully functional. We briefly assess the cost of the security mechanisms in our processor and show that it is reasonable. Introduction
Platform: | Size: 2048 | Author: 关 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 基于FPGA 的快速人脸检测参考资料 大家学习下-FPGA-based Fast face detection
Platform: | Size: 277504 | Author: 李杨 | Hits:

[VHDL-FPGA-Verilog] FaceDetection

Description: 基于adoost的fpga人脸检测程序，代码采用了verilog编写，用的是xilinx的virtex5芯片-face detection based on adboost. verilog is used，and virtex5 it isimplementated on virtex5.
Platform: | Size: 8312832 | Author: 张驠 | Hits:

[Console] faceoreye

Description: 人脸人眼识别功能应用于fpga上可以，或者调试之用-Face the human eye recognition function can be used in fpga
Platform: | Size: 4538368 | Author: 王剑锋 | Hits:

[Video Capture] Face_Detect

Description: 基于FPGA的视频中的人脸检测算法，亲测可用-FPGA video face detection algorithm, pro-test available
Platform: | Size: 2048 | Author: pl | Hits:

[VHDL-FPGA-Verilog] Adaboost_Facerecognition_FPGA

Description: 基于Adaboost的人脸检测算法研究及其FPGA实现-Adaboost based face detection algorithm on FPGA
Platform: | Size: 4689920 | Author: 王小姐 | Hits:

[Software Engineering] 2-Mostefai

Description: REAL TIME FACE FPGA WHITH WEB CAM
Platform: | Size: 1720320 | Author: fawzikarim | Hits:

[VHDL-FPGA-Verilog] AB2639964000

Description: this is fpga BASED HAAR like feature for face detection it s include algorithms and explanations of haar features -this is fpga BASED HAAR like feature for face detection it s include algorithms and explanations of haar features
Platform: | Size: 640000 | Author: saif king | Hits:

[Other] adapt-detailed

Description: THIS IS A PROCEDURE FOR DESIGNING FACE DETECTION AND IMPLEMENTING ON FPGA BY USING GAUSSIAN FILTER DWT AND OTHER IMPORTANT BLOCKS
Platform: | Size: 835584 | Author: raj | Hits:

[VHDL-FPGA-Verilog] tnn7_code_201212141110

Description: 人脸检测与跟踪是一个重要而活跃的研究领域，它在视频监控、生物特征识别、视频编码等领域有着广泛的应用前景。该项目的目标是在FPGA板上实现实时系统来检测和跟踪人脸。人脸检测算法包括肤色分割和图像滤波。通过计算被检测区域的质心来确定人脸的位置。该算法的软件版本独立实现，并在matlab的静止图像上进行测试。虽然从MATLAB到Verilog的转换没有预期的那样顺利，实验结果证明了实时系统的准确性和有效性，甚至在不同的光线、面部姿态和肤色的条件下也是如此。所有硬件实现的计算都是以最小的计算量实时完成的，因此适合于功率受限的应用。(Face detection and tracking is an important and active research field, and it has a wide range of applications in video surveillance, biometrics, video coding and other fields. The goal of the project is to implement real-time systems on the FPGA board to detect and track faces. Face detection algorithms include skin segmentation and image filtering. The location of the human face is determined by calculating the centroid of the detected region. The software version of the algorithm is implemented independently and tested on MATLAB still images. Although the conversion from MATLAB to Verilog is not as smooth as expected, the experimental results demonstrate the accuracy and effectiveness of real-time systems, even in different light, facial gestures and color conditions. All hardware implementations are performed in real-time with minimal computational complexity and are therefore suitable for power constrained applications.)
Platform: | Size: 63488 | Author: 合发 | Hits:

[Software Engineering] jao_v85

Description: Face Recognition light treatment method, Based on negative entropy largest independent component analysis, Relief computing classification weight.
Platform: | Size: 149504 | Author: feijenhou | Hits:

[matlab] FPGA_hslogic_face

Description: FPGA代做，通过matlab实现PCA人脸识别算法，并计算识别率(n the FPGA generation, the PCA face recognition algorithm is realized by MATLAB and the recognition rate is calculated.)
Platform: | Size: 92160 | Author: hlayumi | Hits:

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