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[VHDL-FPGA-Verilog] DEMO22

Description: ＶＨＤＬ源程序，ＭＡＸＰＬＵＳ　环境下运行，电梯控制系统-VHDL source code, under Operation Converter, elevator control system
Platform: | Size: 598016 | Author: liu | Hits:

[File Format] te3560

Description: 基于VHDL语言的实用电梯控制器的设计 -based on VHDL practical elevator controller design based on VHDL practical Elevator Controller VHDL design based on the practical design of the elevator controller based on VHDL practical elevator controller design
Platform: | Size: 94208 | Author: | Hits:

[VHDL-FPGA-Verilog] dianti

Description: vhdl代码： 电梯控制器程序设计与仿真！初学fpga者可以参考参考！！比较简单-VHDL code: Elevator controller design and simulation program! FPGA beginner who can refer to reference! ! Relatively simple
Platform: | Size: 162816 | Author: daxiadian2 | Hits:

[VHDL-FPGA-Verilog] dianti

Description: 以FPGA技术为基础，以VHDL为语言，以QuartusII为工具，设计一个5层楼的电梯控制器-To FPGA technology, to VHDL language to QuartusII as a tool to design a 5-story elevator controller
Platform: | Size: 2048 | Author: linyao | Hits:

[DSP program] DSPFPGA

Description: 针对电梯数据采集数目较多和数据处理复杂等特点,提出了基于数字信号处理器(DSP)和现场可编程门阵列(FPGA)的电梯智能数据采集系统。在介绍了系统整体结构及各组成子模块后,给出了模块与器件之间硬件接口设计思路和架构,描述了整个系统的软件框架,设计了DSP、AD采样、网络通信和抗干扰等程序。整个系统在工程应用中易于实现,具有很好的推广价值-n accordance with the characteristic of elevator for the large number of data acquisition and handling data complicated, an el- evator data acquisition system based on digital signal processor (DSP) and field programmable gate array (FPGA) is given. After system structure and modules are introduced, the design of interfaces of the hardware and framework between modules and devices are provided, the software design used in the system is described, the DSP, AD sampling, network communication
Platform: | Size: 179200 | Author: 将建 | Hits:

[VHDL-FPGA-Verilog] wodewenjian

Description: 基于FPGA的电梯控制系统的设计 将电梯的运行状态划分为开门，一层，二层，三层，四层五个状态，设一层开门为电梯的初始状态，up1,up2,up3分别作为一层，二层，三层的上升请求，四层没有上升请求；down2,down3,down4分别作为二层，三层，四层的下降请求，同理一层是没有下降请求的；s1,s2,s3,s4分别作为一层，二层，三层，四层的停站请求；x1,x2,x3,x4分别作为一层，二层，三层，四层的停站请求显示；door作为门的状态，“0”表示关，“1”表示开；mode作为电梯的运行模式，这里可以用一个seg模块将楼层的显示转换为数码管显示。 -The elevator control system based on FPGA design Will lift operation into a layer, the second door, and three layers, four layers, one of five layers of the elevator opened for the initial state, respectively, up2 up3 up1, as a layer 2 and layer 3, the rise and rise no request for four layers, Down2 down3 down4, respectively, as a second, third, fourth floor request, a drop down the request is not, S1, s2, s3, respectively, as a layer s4 2, 3, 4 stops, Clamps its x1, x2, respectively, as a x4 x3 layer 2 and layer 3, 4, stop that request, As the door, held "0", "1" say, Mode of operation mode, as the elevator here can use a seg module will be converted to digital display floor pipe display.
Platform: | Size: 1024 | Author: 吴海霞 | Hits:

[VHDL-FPGA-Verilog] the-elevator-control-system

Description: 基于fpga的电梯控制系统设计，采用双电梯联动的方式-Fpga-based elevator control system design, using dual elevator linkage
Platform: | Size: 75776 | Author: 凌应龙 | Hits:

[VHDL-FPGA-Verilog] LAB-15

Description: FPGA实现对电梯的设计，verilog实现的。-FPGA implementation of the design of the elevator, verilog achieved.
Platform: | Size: 516096 | Author: 李娟 | Hits:

[VHDL-FPGA-Verilog] elevator_fpga

Description: 基于VHDL的FPGA设计，设计一个4层楼的电梯控制系统。-VHDL-based FPGA design, design elevator control system of a four-storey building.
Platform: | Size: 627712 | Author: shiyan chen | Hits:

[Other] dianti

Description: 该程序实现了以FPGA为核心的电梯控制，可供本科毕业设计参考-The program implements the FPGA as the core of the elevator control, available for undergraduate graduation design reference
Platform: | Size: 4096 | Author: 党正正 | Hits:

[VHDL-FPGA-Verilog] Verilog_HDL_elevator

Description: Verilog实现的基于FPGA的五层楼电梯运行控制逻辑设计-FPGA-based five-story elevator control logic implemented in Verilog design
Platform: | Size: 18432 | Author: 柯家豪 | Hits:

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