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[Other resource] 数字滤波器的FPGA实现

Description: 数字滤波器的FPGA实现,verilogHDL-Digital Filter FPGA, verilogHDL
Platform: | Size: 581198 | Author: 阿乐 | Hits:

[ARM-PowerPC-ColdFire-MIPS] 数字滤波器的FPGA实现

Description: 数字滤波器的FPGA实现,verilogHDL-Digital Filter FPGA, verilogHDL
Platform: | Size: 580608 | Author: 阿乐 | Hits:

[VHDL-FPGA-Verilog] filter 代码

Description: 用verilog实现滤波器的功能，通过软件综合仿真，在利用FPGA实现-using Verilog filter function to achieve through integrated simulation software, the use of FPGA
Platform: | Size: 222208 | Author: 龙明 | Hits:

[DSP program] TMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究，给了了将乘法化为查表的DA算法，并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证，证明了这一方法是可行和高效的，其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[Books] fir_filter

Description: fpga实例体验，一些关于fpga的例子，对新手可能有所帮助-Examples of FPGA experience, some examples on the FPGA, may be helpful to the novice
Platform: | Size: 595968 | Author: yugaoshang | Hits:

[VHDL-FPGA-Verilog] CIC

Description: 介绍了积分梳状滤波器(CIC)设计，压缩包里面有程序的流程图，采用verilogHDL编写，在modelsim上可以实现仿真结果，非常不错-Introduced the integral comb filter (CIC) design, there are procedures for compressed packets flow chart, using verilogHDL prepared on the ModelSim simulation results can be achieved very good
Platform: | Size: 153600 | Author: yaoyongshi | Hits:

[File Format] FIR_FPGA

Description: 介绍FIR滤波器的FPGA高效实现和巧妙验证,不错-FIR filter FPGA introduced to achieve efficient and ingenious authentication, good
Platform: | Size: 283648 | Author: yautou | Hits:

[Program doc] rr

Description: 软件无线电中抽取滤波器的研究与FPGA实现.pdf-Software Radio Research and decimation filter FPGA realize. Pdf
Platform: | Size: 205824 | Author: 郭坚 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: FIR数字滤波器分布式算法的原理及FPGA实现-Distributed Arithmetic FIR digital filter FPGA Principle and realize
Platform: | Size: 599040 | Author: 王杰 | Hits:

[VHDL-FPGA-Verilog] mid-filter

Description: 用vhdl语言实现的中值滤波,硬件需要DE2板-VHDL language used to achieve the median filter, the hardware need to DE2 board
Platform: | Size: 1270784 | Author: 任迎 | Hits:

[VHDL-FPGA-Verilog] DA_FIR

Description: 基于分布式算法的FPGA实现的FIR滤波器源码，VHDL语言编写的，下载工程文件后可直接在QuartusII7.0上运行。-Based on Distributed algorithms realize the FIR filter FPGA source code, VHDL language, download the project file can be run directly in QuartusII7.0.
Platform: | Size: 531456 | Author: CH | Hits:

[Documents] IIRfilterFPGA

Description: 介绍了IIR 滤波器的FPGA 实现方法,给出了 IIR 数字滤波器的时序控制、延时、补码乘法和累加四个模块的设计方法,并用VHDL和FPGA 器件实现了IIR 数字滤波。-Introduction of the IIR filter FPGA implementation method of IIR digital filter timing control, delay, multiplication and accumulation complement the four modules of the design method and device using VHDL and FPGA implementation of IIR digital filter.
Platform: | Size: 661504 | Author: 杨培科 | Hits:

[Software Engineering] firfilter

Description: Filter designed in fpga
Platform: | Size: 1091584 | Author: buhuhubau | Hits:

[Software Engineering] FPGAFIR

Description: FPGA-based high-order FIR filter design
Platform: | Size: 4537344 | Author: 玉玲 | Hits:

[VHDL-FPGA-Verilog] fpga

Description: On a distributed algorithm based on FPGA pipelined FIR filter of the article.
Platform: | Size: 1306624 | Author: haha | Hits:

[VHDL-FPGA-Verilog] sinc3filter

Description: 实现sinc3 FILTER的VHDL源码，还有实现SPI通讯的。-Sinc3 FILTER to achieve the VHDL source code, as well as the realization of SPI communication.
Platform: | Size: 5120 | Author: 李天鸿 | Hits:

[matlab] filter

Description: 这是基于MATLAB下的XILINX的FPGA的FIR滤波器的模型设计文件-This is a MATLAB-based FPGA of the XILINX Model of the FIR filter design documents
Platform: | Size: 268288 | Author: xueanxi | Hits:

[VHDL-FPGA-Verilog] TheDesignofFIRFilterBasedonFPGA

Description: 从分析FIR 数字滤波器的原理和设计方法入手,主要针对基于FPGA 实现数字滤波器乘法器的算法进行了比较研究,并通过一个8 阶FIR 低通滤波器的具体设计,简要分析比较了几种算法的优越性和缺点,从而充分发掘和利用FPGA 的高速特性。-From the analysis of FIR digital filter design theory and approach, mainly based on the realization of digital filter FPGA multiplier comparative study of algorithms, and through an 8-order FIR low-pass filter specific design, a brief analysis and comparison of several advantages and disadvantages of the algorithm in order to fully explore and make use of FPGA high-speed characteristics.
Platform: | Size: 6372352 | Author: xxxmmmccc | Hits:

[VHDL-FPGA-Verilog] 1

Description: 串并滤波器(FPGA源码),基于QuartusII开发设计实现的串并滤波器.-String and filter (FPGA source code), based on the achievement of development and design of QuartusII and filter string.
Platform: | Size: 7168 | Author: 南才北往 | Hits:

[VHDL-FPGA-Verilog] cic-digital-filter-with-fpga

Description: cic digital filter with fpga
Platform: | Size: 144384 | Author: ligongfu | Hits:
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