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[Other resourcefftlib

Description: 使用Ti提供的支持库编写的1024、2048或4096点FFT-use the support provided for the preparation of 1024,2048 or 4096-point FFT
Platform: | Size: 5731 | Author: rhodesn | Hits:

[Other resourcefft-by_skyline

Description: 这是一个我自己写的FFT的c程序,可以计算n(<4096)个点(可以是虚数)的结果 -This is one I wrote it myself FFT c procedures can be calculated n (
Platform: | Size: 2132 | Author: 王靖杰 | Hits:

[Embeded-SCM Develop4096点FFT源码

Description: 4096点FFT,C语言开发源码
Platform: | Size: 4402 | Author: chang3092@126_com | Hits:

[DSP programfftlib

Description: 使用Ti提供的支持库编写的1024、2048或4096点FFT-use the support provided for the preparation of 1024,2048 or 4096-point FFT
Platform: | Size: 5120 | Author: rhodesn | Hits:

[Algorithmfft-by_skyline

Description: 这是一个我自己写的FFT的c程序,可以计算n(<4096)个点(可以是虚数)的结果 -This is one I wrote it myself FFT c procedures can be calculated n (
Platform: | Size: 2048 | Author: 王靖杰 | Hits:

[DSP programfft-4096

Description: 在window下开发的4096点FFT源码,使用C开发,对学习数字信号处理有一定帮助-Developed in the window of 4096 points FFT source, the use of C development, digital signal processing to study some help
Platform: | Size: 2048 | Author: Marcus Chang | Hits:

[Algorithmofdm8mhz

Description: ofdm trasnmission using 4096 fft samples. with transmission rate 8mhz
Platform: | Size: 1024 | Author: jack | Hits:

[Algorithmmyfft

Description: 4096点混合基的FFT算法,本人已调试通过,希望对朋友们有帮助-4096-point FFT-based hybrid algorithm, I have debug through, in the hope that my friends have to help
Platform: | Size: 16384 | Author: 尚龙 | Hits:

[Documentsex6-1

Description: The Zoom-FFT is a process where an input signal is mixed down to baseband and then decimated, prior to passing it into a standard FFT. The advantage is for example that if you have a sample rate of 10 MHz and require at least 10Hz resolution over a small frequency band (say 1 KHz) then you do not need a 1 Mega point FFT, just decimate by a factor of 4096 and use a 256 point FFT which is obviously quicker.
Platform: | Size: 5120 | Author: 张鹏程 | Hits:

[VHDL-FPGA-Verilogcf_fft_latest.tar

Description: The FFT architecture is pipelined on a rank basis each rank has its own butterfly and ranks are isolated from each other using memory interleavers. This FFT can perform calculations on continuous streaming data (one data set right after another). More over, inputs and outputs are passed in pairs, doubling the bandwidth. For instance, a 4096 point FFT can perform a transform every 2048 cycles-The FFT architecture is pipelined on a rank basis each rank has its own butterfly and ranks are isolated from each other using memory interleavers. This FFT can perform calculations on continuous streaming data (one data set right after another). More over, inputs and outputs are passed in pairs, doubling the bandwidth. For instance, a 4096 point FFT can perform a transform every 2048 cycles
Platform: | Size: 3125248 | Author: amin | Hits:

[VHDL-FPGA-VerilogHigh-Speed-FFT

Description: 优秀硕士论文,课题采用现场可编程门阵列((FPGA),设计实现了一种超高速FFT处理器。目前,使用FPGA实现FFT多采用基2和基4结构,随着FPGA规模的不断扩大,使采用更高基数实现FFT变换成为可能。本课题就是采用Alter的Stratix II芯片完成了基16-FFT处理器的设计。在设计实现过程中,以基2-FFT搭建基16-FFT的运算核,合理安排时序,解决了碟形运算、数据传输和存储操作协调一致的问题。由于采用流水线工作方式,使整个系统的数据交换和处理速度得以很大提高。本设计实现了4096点和256点的变换,两个内部运算时钟都可以达到1 OOMHz以上,其中256点变换的数据吞吐率高达1.36GHz -a design of ultra high speed FFT processor based onFPGA is developed in this paper. At present we always use radix-2 and radix-4 tocarry out FFT. When the scale of FPGA is panding,it s possible to implement higher radix FFT. This topic uses Stratix II of Altera company to carry out a processor of radix一16 FFT.In this design, radix-16 FFT is carried out by radix-2FFT, The design uses rational time sequence arrangement to make butterflycomputing,data transformation and memory coincide.In order to avoid the bottleneck,pipeline pattern is used,this method acceletates the operating.Thescheme realizes the 4096-points and 256-points FFT, their operation clocks canboth reach above 100MHz. Among them ,the throughput of 256-points FFT is up to1.36GHz.
Platform: | Size: 3759104 | Author: 陈子牙 | Hits:

[matlabPN2048_FFT4096_Sim

Description: fft计算相关函数,验证4096点的FFT快速捕获算法(理论仿真)-fft calculation of correlation function, verify the 4096-point FFT algorithm for fast capture (theoretical simulation)
Platform: | Size: 2048 | Author: 易长路 | Hits:

[Algorithmfft_ifft

Description: 定点化Complex16快速基4 FFT(IFFT)代码,使用SSE针对Intel CPU优化,支持阶数4-4096 其中计算4096阶FFT仅需10us-Fixpoint (Complex16) base 4 FFT code, using SSE to optimize for Intel CPU, supporting order of 4-4096
Platform: | Size: 50176 | Author: arssur | Hits:

[Algorithmfft

Description: 改进的算法导论中的fft代码,将nlogn的复杂度下降到n,编译成功,4096个数据点时常为2秒。-Fft code in the Introduction of the improved algorithm will be the nlogn of complex decreased to n successful compile 4096 data points from time to time for two seconds.
Platform: | Size: 2048 | Author: | Hits:

[Software EngineeringComposite-frequency-design

Description: 本文介绍了一种复合信号测量系统,该系统基于TMS320F2808实现,用来检测和重建复合频率信号中的主次信号。该系统由计算模块、重建模块和通讯模块组成。为了能在实时运行中自适应地确定采样频率,我们采取了“eCAP+AD”的方法,eCAP模块记录下整形后的复合信号的上升沿过零点时间值并估计出主频率,从而使系统能自动地选取合适的采样频率完成AD采样过程。系统采用了4096点的FFT算法,能够实现高达0.25Hz的频率分辨率,相对分辨率达到0.05 。-This paper introduces a measurement system based on TMS320F2808 to realize the detection and reconstruction of the primary and secondary sinusoidal signals in a mixed-frequency signal. This system consists of the calculation module, the reconstruction module and the communication module. In order to self-adaptively determine the suitable sample frequency during the real-time operation, we proposed a eCAP+AD method. The eCAP module records the time of the rising-edge zero-crossing point of the reshaped mixed signals and estimates the value of the max frequency, hence the system automatically selects the right sample frequency to implement the ADC process. By employing the FFT algorithm with 4096 points, it can realize a frequency resolution as high as 0.25Hz with a relative resolution ratio of 0.05 .
Platform: | Size: 17652736 | Author: | Hits:

[Audio programfwav.cb6

Description: 利用FFT计算WAV文件的信号频谱,可以选择2048点/4096点/8192点运算,频谱分辨率高-The FFT calculation WAV files signal spectrum can choose the 2048/4096/8192 point operations, high spectral resolution
Platform: | Size: 227328 | Author: 夏永明 | Hits:

[VHDL-FPGA-Verilogfft4096_8192

Description: 基于基2的并行4096,8192深度的FFT源代码verilog-Based on radix-2 FFT parallel 4096,8192 depth verilog source code
Platform: | Size: 18432 | Author: tianshan | Hits:

[AlgorithmFFT(4096)

Description: 用C语言写的FFT算法,能够直接移植于下位机,方便底层开发。-Written in C language FFT algorithm, can be directly transplanted in the lower machine to facilitate development of the bottom.
Platform: | Size: 2048 | Author: susan | Hits:

[VHDL-FPGA-Verilogcf_fft

Description: 用verilogHDL写的实现4096点FFT的算法,附带quartus ii工程.-VerilogHDL achieved with 4096-point FFT written algorithm works with quartus ii
Platform: | Size: 3271680 | Author: 毛宏斌 | Hits:

[matlabchengxu2

Description: matlab程序 第一个是计算方波信号的DFT 第二个是不同时窗正弦信号的频谱分析 第三个是加窗后的频谱特性分析 第四个是4096点FFT的频谱 第五个是CZT变换 专注MATALB,各位大神给力奉献-The calculation of the square wave signal DFT
Platform: | Size: 2048 | Author: sysk | Hits:
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