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Description: 基于FPGA的16点FFT快速傅立叶变换的Verilog源代码。-the FFT implement of Verilog based on FPGA
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Size: 2048 |
Author: lsd |
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Description: 8-1024可变点数FFT/IFFT变换,VHDL语言设计,
仿真通过,可以很容易综合.-8-1024 points FFT/IFFT transform, VHDL design, simulation, can easily integrated.
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Size: 274432 |
Author: citybus |
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Description: 1024点8位FFT的VHDL语言实现方式,大家可以参考一下。-1024-point FFT eight VHDL way, we can take a look.
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Size: 12288 |
Author: 郭子荣 |
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Description: 1024点,16位FFT VHDL 程序。1024点,16位FFT VHDL 程序-1024, 16 FFT VHDL procedures. 1024, 16 FFT VHDL procedures
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Size: 17408 |
Author: 肖建华 |
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Description: cordic verilog 程序及仿真结果 8级流水线-cordic verilog simulation results procedures and eight lines
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Size: 1024 |
Author: elisen |
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Description: :文章针对目前数字信号处理中大量采用的快速傅立叶变换[FFT] 算法采用软件编程来处理的应用现状,在对FFT 算法进行
分析的基础上,给出了用FPGA[Field Programmable Gate Array] 实现的8 点32 位FFT 处理器方案,并得到了系统的仿真结果。
最后在Altera 公司FLEX10K系列FPGA 芯片上成功地实现了综合。-Based on the analysis of the FFT algorithm , a reasonable logic structure for a 8-point ,32- bit FFT processor is described and the simulating
result is given in this paper. The processor is implemented on the FLEX10Kfamily of FPGAs.
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Size: 220160 |
Author: 王晓 |
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Description: verilog语言实在点变换DFT源代码,可以配合软核或者其他CPU进行综合FFT变换,也可以单独使用生成module!-verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module!
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Size: 1024 |
Author: 刘庆 |
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Description: The verilog implementation of 8-point FFT in verilog. Radix 2 Decimation in Frequency.
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Size: 10240 |
Author: Hong-soo |
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Description: 使用altra的quartus8.1作为开发环境,用硬件语言VHDL实现了fft的变化-Altra as quartus8.1 use the development environment, language VHDL hardware changes to achieve the fft
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Size: 71680 |
Author: 黄易飞 |
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Description: 512点8位基2fft程序。基于
vhdl/verilog。已仿真布线通过。-512 points, eight base 2fft program. Based on vhdl/verilog. Simulation layout has been adopted.
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Size: 20480 |
Author: 包鼎华 |
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Description: 8点位数可变FFT算法的VHDL语言
已通过quartusii编译仿真-8-digit variable FFT algorithm VHDL, simulation has been compiled by quartusii
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Size: 2694144 |
Author: justin |
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Description: 该工程实现了一个64点FFT,verilog编写,采用R4SDF结构,通过Modelsim功能仿真,压缩包里有rtl代码,dc脚本,输出报告。-The project implements a 64-point FFT, verilog compiled by R4SDF structure, through the Modelsim functional simulation, compression bag with rtl code, dc script, the output report.
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Size: 1255424 |
Author: ShuChen |
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Description: FFT8,8点FFT运算,用verilog vhdl 语言编写,可以应用于64点FFT-FFT8, 8 点 FFT computation, using verilog vhdl language, can be applied to 64-point FFT
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Size: 3072 |
Author: 姚兴波 |
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Description: vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project
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Size: 364544 |
Author: tejaswini |
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Description: The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency
It is very good
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Size: 64512 |
Author: 小鸟动人 |
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Description: The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 64-point FFT in VHDL. Radix 2 Decimation in Frequency
i am found of it.It s really very good!
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Size: 31744 |
Author: 小鸟动人 |
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Description: vhdl for fft and ofdm
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Size: 51200 |
Author: ingo |
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Description: Digital signal processing fft algorithm using FPGA development vhdl language
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Size: 114688 |
Author: rayesh pai |
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Description: The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input datais a vector of 16 complex values
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Size: 119808 |
Author: rayesh pai |
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Description: FPGA下用VHDL实现的基2 cooley-tukey的8位FFT算法,在quartus ii环境下验证成功。-Under FPGA with base 2 cooley-tukey of 8 FFT algorithm VHDL realize, in quartus ii environment successfully verified.
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Size: 7577600 |
Author: lht |
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