Description: This paper review the effectiveness of the parity space approach
to identify faults or disturbance in a system. The most commonly
used is the observer based procedures, and redundancy relationship
method. This involves analytical mathematical analysis of
geometry and bilinear algebra. Then, technological advances which
require complex computation such as artificial intelligence and
genetic algorithm had made tremendous improvement to fault
Detection and Isolation (FDI) analysis. Dynamic Parity Space
Approach was studied for a discrete state-space model. Important
data will be extracted using this approach especially for residual
generation which is the backbones of FDI analysis. Subsequently,
at each time instant k, the generated residuals will form a matrix
that will define the fault signature. It is remarkable that this
approach is proven in this study to be effective in diagnosis and
faults isolation. Platform: |
Size: 2606080 |
Author:Hazrul |
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Description: This paper presents a compact, low-cost, on-line error-detection architecture for a 32-bit hardware
implementation of the AES. The implemented AES is specially designed for FPGA-based embedded applications,
since it is tuned to specific FPGA logic resources. The on-line error-detection is based on parity
codes. The parity prediction is implemented in the AES encryption, decryption, and key expansion process.
The developed solution has been upgraded to an efficient BIST with a high fault coverage and a
low hardware overhead. Platform: |
Size: 940032 |
Author:ANU MOHAN |
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